G06F 9/3012
Organisation of register space
Official title: {Organisation of register space, e.g. banked or distributed register file}
G06F9/3012 (Organisation of register space) appears on 2,765 US grants and 2,597 published applications in this corpus.
Search patents in G06F- Granted patents
- 2,765
- Published applications
- 2,597
- Assignees
- 567
- Inventors
- 4,187
- Latest grant
- 22 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 1 | 0 |
| 1977 | 2 | 0 |
| 1978 | 3 | 0 |
| 1979 | 0 | 0 |
| 1980 | 1 | 0 |
| 1981 | 1 | 0 |
| 1982 | 2 | 0 |
| 1983 | 3 | 0 |
| 1984 | 2 | 0 |
| 1985 | 1 | 0 |
| 1986 | 2 | 0 |
| 1987 | 2 | 0 |
| 1988 | 3 | 0 |
| 1989 | 6 | 0 |
| 1990 | 5 | 0 |
| 1991 | 8 | 0 |
| 1992 | 10 | 0 |
| 1993 | 14 | 0 |
| 1994 | 12 | 0 |
| 1995 | 19 | 0 |
| 1996 | 30 | 0 |
| 1997 | 34 | 0 |
| 1998 | 64 | 0 |
| 1999 | 63 | 0 |
| 2000 | 83 | 0 |
| 2001 | 89 | 23 |
| 2002 | 55 | 66 |
| 2003 | 58 | 68 |
| 2004 | 51 | 110 |
| 2005 | 43 | 83 |
| 2006 | 73 | 64 |
| 2007 | 61 | 61 |
| 2008 | 62 | 106 |
| 2009 | 62 | 67 |
| 2010 | 70 | 59 |
| 2011 | 69 | 54 |
| 2012 | 51 | 102 |
| 2013 | 58 | 116 |
| 2014 | 88 | 102 |
| 2015 | 94 | 104 |
| 2016 | 118 | 120 |
| 2017 | 127 | 126 |
| 2018 | 96 | 103 |
| 2019 | 126 | 187 |
| 2020 | 156 | 181 |
| 2021 | 190 | 164 |
| 2022 | 169 | 135 |
| 2023 | 135 | 135 |
| 2024 | 129 | 107 |
| 2025 | 108 | 84 |
| 2026 | 56 | 70 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Operating system-level assistive features for contextual privacy22 Sep 2026US 12,743,490 B2Google Inc.
- Technique for handling ordering constrained access operations15 Sep 2026US 12,737,185 B2Arm Limited
- Vector floating-point classification8 Sep 2026US 12,730,635 B2Texas Instruments Incorporated
- Exception return state lock parameter8 Sep 2026US 12,730,638 B2Arm Limited
- Indexed vector permutation operations8 Sep 2026US 12,730,639 B2Arm Limited
- Display method, electronic device, and readable medium8 Oct 2026US 2026/0310491 A1Honor Device Co., Ltd.
- Compiler-automated collection element address compression and access1 Oct 2026US 2026/0299904 A1Zoho Corporation Private Limited
- Systems, methods, and apparatuses for tile transpose24 Sep 2026US 2026/0288459 A1Intel Products IP LLC
- Vector floating-point classification24 Sep 2026US 2026/0288460 A1Texas Instruments Incorporated
- System and method for addressing data in memory24 Sep 2026US 2026/0288463 A1Texas Instruments Incorporated
Most cited
By later US patents
- Packet processing system including a policy engine having a classification unit624US 6,157,955 AIntel Corporation · 2000
- Multiple address-space data processor with addressable register and context switching470US 5,201,039 AMitsubishi Denki Kabushiki Kaisha · 1993
- Processing architecture having a compare capability417US 7,028,170 B2Sun Microsystems, Inc. · 2006
- Processor-cache system and method417US 9,047,193 B2Shanghai Xin Hao Micro Electronics Co. Ltd. · 2015
- Three-dimensional vector co-processor having I, J, and K register files and I, J, and K execution units292US 5,187,796 AComputer Motion, Inc. · 1993