System and method for addressing data in memory
AssigneeTexas Instruments Incorporated
InventorsTimothy David ANDERSON, Duc Quang BUI, Joseph ZBICIAK, Kai CHIRCA
Life of this patent
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Abstract
A digital signal processor having a CPU with a program counter register and, optionally, an event context stack pointer register for saving and restoring the event handler context when higher priority event preempts a lower priority event handler. The CPU is configured to use a minimized set of addressing modes that includes using the event context stack pointer register and program counter register to compute an address for storing data in memory. The CPU may also eliminate post-decrement, pre-increment and post-decrement addressing and rely only on post-increment addressing.
Claims18
A method comprising:
- storing, in a first field of a stack pointer register, a portion of a base address;
- storing, in a second field of the stack pointer register, a nested count;
- loading, by a set of functional units in a first mode, a first set of data from a first address specified by a program counter register;
- and
- loading, by the set of functional units in a second mode, a second set of data from a second address specified by the stack pointer register.
A digital signal processor (DSP) comprising:
- a vector central processing unit (CPU) core including:
- control registers including a stack pointer register and a program counter register, the stack pointer register including an address field configured to store a portion of a base address and a nested count field configured to store a nested count;
- and
- a set of functional units;
- and
- a streaming engine operatively coupled to the vector CPU core and including streaming address generators, each of which is associated with a streaming address offset register;
- wherein one or more functional units of the set of functional units is configured to:
- in a first mode, store a first set of data to a first address based on the program counter register;
- and
- in a second mode, store a second set of data to a second address based on the stack pointer register.
Dependencies are inferred from the claim text.