Exception return state lock parameter
AssigneeArm Limited
InventorsSimon John Craske, John Michael Horley
Life of this patent
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AssigneeArm Limited
InventorsSimon John Craske, John Michael Horley
Estimating the term…
An apparatus comprises exception return state register storage, and processing circuitry. In response to a guarded control stack (GCS) exception return state push instruction, the processing circuitry obtains exception return state information from the exception return state register storage and push the state information to a GCS data structure. In response to a GCS exception return state pop instruction, the processing circuitry obtains GCS-protected exception return state information from the GCS data structure. In at least one operating state, the processing circuitry detects, in response to an attempt to modify the exception return state information stored in the exception return state register storage, whether an exception return state lock parameter is in a locked state or an unlocked state, and signals a fault when it is in the locked state.
An apparatus comprising:
A method comprising:
A non-transitory, computer-readable storage medium storing a computer program comprising instructions which, when executed by a host data processing apparatus, control the host data processing apparatus to provide an instruction execution environment for executing target code, the computer program comprising:
Dependencies are inferred from the claim text.