G06F 13/1647
With interleaved bank access
Official title: {with interleaved bank access}
G06F13/1647 (With interleaved bank access) appears on 233 US grants and 205 published applications in this corpus.
Search patents in G06F- Granted patents
- 233
- Published applications
- 205
- Assignees
- 120
- Inventors
- 478
- Latest grant
- 25 Aug 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1978 | 1 | 0 |
| 1979 | 0 | 0 |
| 1980 | 0 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 0 | 0 |
| 1985 | 0 | 0 |
| 1986 | 2 | 0 |
| 1987 | 1 | 0 |
| 1988 | 0 | 0 |
| 1989 | 2 | 0 |
| 1990 | 2 | 0 |
| 1991 | 1 | 0 |
| 1992 | 1 | 0 |
| 1993 | 3 | 0 |
| 1994 | 1 | 0 |
| 1995 | 2 | 0 |
| 1996 | 0 | 0 |
| 1997 | 4 | 0 |
| 1998 | 6 | 0 |
| 1999 | 8 | 0 |
| 2000 | 4 | 0 |
| 2001 | 4 | 1 |
| 2002 | 12 | 6 |
| 2003 | 4 | 13 |
| 2004 | 8 | 7 |
| 2005 | 7 | 9 |
| 2006 | 9 | 9 |
| 2007 | 8 | 8 |
| 2008 | 4 | 8 |
| 2009 | 5 | 5 |
| 2010 | 9 | 7 |
| 2011 | 4 | 7 |
| 2012 | 6 | 6 |
| 2013 | 5 | 6 |
| 2014 | 4 | 11 |
| 2015 | 8 | 8 |
| 2016 | 16 | 9 |
| 2017 | 7 | 7 |
| 2018 | 6 | 8 |
| 2019 | 9 | 6 |
| 2020 | 9 | 11 |
| 2021 | 10 | 13 |
| 2022 | 11 | 7 |
| 2023 | 8 | 11 |
| 2024 | 7 | 9 |
| 2025 | 8 | 7 |
| 2026 | 7 | 6 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Scalable address decoding scheme for CXL Type-2 devices with programmable interleave granularity25 Aug 2026US 12,717,744 B2Intel Corporation
- Memory device with a die having multiple pseudo channels per channel2 Jun 2026US 12,645,577 B2Micron Technology, Inc.
- Memory component timed by programmably-selected clock edge7 Apr 2026US 12,597,454 B2Rambus Inc.
- Storage device and operating method thereof31 Mar 2026US 12,591,380 B2Samsung Electronics Co., Ltd.
- Data processing device13 Jan 2026US 12,524,335 B2Infineon Technologies AG
- Memory-efficient data format and utilization for parallel processing17 Sep 2026US 2026/0277830 A1Roche Sequencing Solutions, Inc.
- Memory control component23 Jul 2026US 2026/0212905 A1Rambus Inc.
- Signal timing for a memory device with a die having multiple pseudo channels per channel21 May 2026US 2026/0140864 A1Micron Technology, Inc.
- Memory bank reassignment9 Apr 2026US 2026/0099440 A1Infineon Technologies AG
- Low power 4:1 multiplexed rank dual inline memory modules12 Mar 2026US 2026/0072854 A1Intel Corporation
Most cited
By later US patents
- Memory controller with burst addressing circuit162US 5,729,709 AIntel Corporation · 1998
- High performance storage unit108US 4,633,434 ASperry Corporation · 1986
- Memory control system for transferring selected words in a multiple memory word exchange during one memory cycle104US 4,099,231 ADigital Equipment Corporation · 1978
- Method and apparatus for providing concurrent access by a plurality of agents to a shared memory84US 5,815,167 AIntel Corporation · 1998
- Memory control system and method utilizing distributed memory controllers for multibank memory80US 6,026,464 ACisco Technology, Inc. · 2000