US 2026/0099440 A1 · MEMORY BANK REASSIGNMENT

Abstract

A chip, including: a plurality of memory banks; a plurality of memory controllers configured to control access to the plurality of memory banks; and a memory access system configured to: detect a failure of a first memory controller of the plurality of memory controllers; and in response to detecting the failure, reassign at least one memory bank previously assigned to the first memory controller to at least one other memory controller of the plurality of memory controllers that remains operational. Correspondingly, a method is provided in which the memory access system detects a controller failure, performs the reassignment of the associated memory bank or banks, and thereafter controls access through the newly assigned controller.

Claims20

Dependent claims

A method, comprising:

detecting, by a memory access system in a chip, a failure of a first memory controller that is configured to control access to at least one memory bank of a plurality of memory banks in the chip;
in response to detecting the failure, reassigning the at least one memory bank from the first memory controller to a second memory controller of a plurality of memory controllers in the chip;
and
controlling access to the at least one memory bank by the second memory controller after the reassigning.

1 more element

Dependencies are inferred from the claim text.

Facts

Application

19/393,058Filed 18 Nov 2025

Priority

DE 102022105146.34 Mar 2022

Published

9 Apr 2026

Term ends

Not estimatedThe source records don’t support an estimate.

Classification13 codes

G06F 12/0246
Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory: in block erasable memory, e.g. flash memory
G11C 8/12
Arrangements for selecting an address in a digital store: group selection circuits, e.g. for memory block selection, chip selection, array selection
G06F 12/0284
User address space allocation, e.g. contiguous or non contiguous base addressing: multiple user address space allocation, e.g. using different…
G06F 13/1647
Based on arbitration: with interleaved bank access

Memory bank reassignment

Life of this patent

Memory bank reassignment

Life of this patent

Abstract

Claims20