Data processing device
AssigneeInfineon Technologies AG
InventorsUlrich Backhausen, Julie Henzler, Thomas Rabenalt
Life of this patent
Estimating the term…
Abstract
A method for dynamically activating a plurality of memory banks by way of a plurality of memory controllers in a chip, each of the memory banks being able to be read and written to independently of the other memory banks and each of the memory banks being able to be activatable by multiple of the plurality of memory controllers in each case. The method includes receiving information about an operating state of the chip, dynamically producing assignments of memory controllers to the memory banks based on the operating state of the chip, and activating the memory banks by way of the memory controllers in accordance with the produced assignments.
Claims12
A method for dynamically activating a plurality of memory banks by way of a plurality of memory controllers in a chip, each of the memory banks being readable and writable independent of the other memory banks, and each of the memory banks being activatable by multiple of the plurality of memory controllers in each case, the method comprising:
- receiving information about an operating state of the chip;
- dynamically producing assignments of memory controllers to the memory banks based on the operating state of the chip, wherein the operating state of the chip is a boot state, a reset state, a test mode state, or a software update state;
- and
- activating the memory banks by way of the memory controllers in accordance with the produced assignments.
A chip having a plurality of memory banks and a plurality of memory controllers, each of the memory banks being readable and writable independent of the other memory banks, and each of the memory banks being activatable by multiple of the plurality of memory controllers in each case, comprising:
- a memory access system designed to receive information about an operating state of the chip, and to dynamically produce assignments of memory controllers to the memory banks based on the operating state of the chip, wherein the operating state of the chip is a boot state, a reset state, a test mode state, or a software update state;
- and
- an allocation unit to connect memory banks to memory controllers in accordance with the assignments in response to an activation signal that is generated by the memory access system.
Dependencies are inferred from the claim text.