Y10S 257/903
Fet configuration adapted for use as static memory cell
Official title: FET configuration adapted for use as static memory cell
Y10S257/903 (Fet configuration adapted for use as static memory cell) appears on 1,266 US grants and 502 published applications in this corpus.
Search patents in Y10S- Granted patents
- 1,266
- Published applications
- 502
- Assignees
- 208
- Inventors
- 1,248
- Latest grant
- 10 Oct 2023
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 2 | 0 |
| 1977 | 0 | 0 |
| 1978 | 0 | 0 |
| 1979 | 3 | 0 |
| 1980 | 5 | 0 |
| 1981 | 5 | 0 |
| 1982 | 3 | 0 |
| 1983 | 3 | 0 |
| 1984 | 3 | 0 |
| 1985 | 8 | 0 |
| 1986 | 11 | 0 |
| 1987 | 8 | 0 |
| 1988 | 10 | 0 |
| 1989 | 19 | 0 |
| 1990 | 15 | 0 |
| 1991 | 30 | 0 |
| 1992 | 23 | 0 |
| 1993 | 24 | 0 |
| 1994 | 52 | 0 |
| 1995 | 62 | 0 |
| 1996 | 63 | 0 |
| 1997 | 77 | 0 |
| 1998 | 100 | 0 |
| 1999 | 80 | 0 |
| 2000 | 70 | 0 |
| 2001 | 61 | 20 |
| 2002 | 61 | 56 |
| 2003 | 38 | 37 |
| 2004 | 64 | 59 |
| 2005 | 39 | 67 |
| 2006 | 48 | 48 |
| 2007 | 53 | 44 |
| 2008 | 40 | 43 |
| 2009 | 36 | 32 |
| 2010 | 41 | 19 |
| 2011 | 32 | 23 |
| 2012 | 25 | 16 |
| 2013 | 12 | 10 |
| 2014 | 7 | 7 |
| 2015 | 9 | 5 |
| 2016 | 9 | 4 |
| 2017 | 4 | 3 |
| 2018 | 3 | 2 |
| 2019 | 2 | 4 |
| 2020 | 3 | 1 |
| 2021 | 1 | 1 |
| 2022 | 1 | 1 |
| 2023 | 1 | 0 |
By publication year. Applications have been published since 2001.
Subgroups
Granted patents
Recent patents
- Floating body memory cell having gates favoring different conductivity type regions10 Oct 2023US 11,785,759 B2Intel Corporation
- Floating body memory cell having gates favoring different conductivity type regions4 Oct 2022US 11,462,540 B2Intel Corporation
- Floating body memory cell having gates favoring different conductivity type regions9 Feb 2021US 10,916,547 B2Intel Corporation
- SRAM cell with T-shaped contact25 Aug 2020US 10,756,095 B2Texas Instruments Incorporated
- SRAM cell with T-shaped contact18 Aug 2020US 10,748,913 B2Texas Instruments Incorporated
- Floating body memory cell having gates favoring different conductivity type regions29 Dec 2022US 2022/0415894 A1Intel Corporation
- Floating body memory cell having gates favoring different conductivity type regions27 May 2021US 2021/0159228 A1Intel Corporation
- Floating body memory cell having gates favoring different conductivity type regions1 Oct 2020US 2020/0312854 A1Intel Corporation
- Floating body memory cell having gates favoring different conductivity type regions19 Dec 2019US 2019/0386007 A1Intel Corporation
- Sram cell with t-shaped contact16 May 2019US 2019/0148386 A1Texas Instruments Incorporated
Most cited
By later US patents
- Merged logic and memory combining thin film and bulk Si transistors326US 6,620,659 B2International Business Machines Corporation · 2003
- Nonvolatile static random access memory devices292US 4,300,212 AXicor, Inc. · 1981
- FET channel having a strained lattice structure along multiple surfaces269US 6,921,982 B2International Business Machines Corporation · 2005
- SRAM constructions, and electronic systems comprising SRAM constructions229US 7,183,611 B2Micron Technology, Inc. · 2007
- MOS-type semiconductor integrated circuit device216US 5,258,635 AKabushiki Kaisha Toshiba · 1993