H05K 3/0041
By plasma etching
Official title: {by plasma etching}
H05K3/0041 (By plasma etching) appears on 218 US grants and 256 published applications in this corpus.
Search patents in H05K- Granted patents
- 218
- Published applications
- 256
- Assignees
- 120
- Inventors
- 456
- Latest grant
- 8 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1981 | 1 | 0 |
| 1982 | 1 | 0 |
| 1983 | 0 | 0 |
| 1984 | 1 | 0 |
| 1985 | 2 | 0 |
| 1986 | 0 | 0 |
| 1987 | 2 | 0 |
| 1988 | 3 | 0 |
| 1989 | 7 | 0 |
| 1990 | 6 | 0 |
| 1991 | 5 | 0 |
| 1992 | 7 | 0 |
| 1993 | 11 | 0 |
| 1994 | 9 | 0 |
| 1995 | 9 | 0 |
| 1996 | 2 | 0 |
| 1997 | 4 | 0 |
| 1998 | 6 | 0 |
| 1999 | 3 | 0 |
| 2000 | 4 | 0 |
| 2001 | 6 | 1 |
| 2002 | 3 | 6 |
| 2003 | 4 | 10 |
| 2004 | 5 | 11 |
| 2005 | 8 | 6 |
| 2006 | 5 | 8 |
| 2007 | 5 | 2 |
| 2008 | 6 | 9 |
| 2009 | 1 | 5 |
| 2010 | 4 | 5 |
| 2011 | 3 | 3 |
| 2012 | 5 | 3 |
| 2013 | 4 | 3 |
| 2014 | 1 | 3 |
| 2015 | 7 | 12 |
| 2016 | 5 | 6 |
| 2017 | 4 | 12 |
| 2018 | 7 | 4 |
| 2019 | 13 | 9 |
| 2020 | 5 | 8 |
| 2021 | 3 | 11 |
| 2022 | 5 | 7 |
| 2023 | 10 | 8 |
| 2024 | 5 | 7 |
| 2025 | 4 | 1 |
| 2026 | 7 | 96 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Method of producing printed circuit boards and printed circuit boards produced in accordance with the method8 Sep 2026US 12,733,108 B2Gebr. Schmid GmbH & Co.
- Wiring substrate4 Aug 2026US 12,701,658 B2Ibiden Co., Ltd.
- Printed wiring board16 Jun 2026US 12,660,085 B2Ibiden Co., Ltd.
- Printed wiring board17 Mar 2026US 12,581,597 B2Ibiden Co., Ltd.
- Prediction method and information processing apparatus for predicting the process result in a plasma etching process24 Feb 2026US 12,562,352 B2Tokyo Electron Limited
- Simultaneous Silicon Spring and Chip Singulation DRIE13 Aug 2026US 2026/0239987 A1
- High Current Column Grid Array Pillars13 Aug 2026US 2026/0240010 A1
- Targeted Jet-Cooling System for Zetta-Scale Computing Assemblies16 Jul 2026US 2026/0202891 A1
- Local-Bias Adaptive Drive for Timing Stabilization in Pipelined Mixed-Precision Processing Elements16 Jul 2026US 2026/0203017 A1
- Pipelined Fused Multiply-Add Processing Element for FP4 Weight and FP8 Activation Arithmetic with FP8 Accumulation16 Jul 2026US 2026/0203018 A1
Most cited
By later US patents
- High-density, multi-level interconnects, flex circuits, and tape for tab285US 5,106,461 AMassachusetts Institute of Technology · 1992
- Methods of forming channels and vias in insulating layers187US 5,173,442 AMicroelectronics and Computer Technology Corporation · 1992
- Laser beam scanning method for forming via holes in polymer materials168US 4,894,115 AGeneral Electric Company · 1990
- Forming via holes in a multilevel substrate in a single step139US 5,227,013 AMicroelectronics and Computer Technology Corporation · 1993
- Method for producing via holes in polymer dielectrics127US 4,764,485 AGeneral Electric Company · 1988