H03L 7/1803
The counter or frequency divider being connected to a cycle or pulse
Official title: {the counter or frequency divider being connected to a cycle or pulse swallowing circuit}
H03L7/1803 (The counter or frequency divider being connected to a cycle or pulse) appears on 17 US grants and 14 published applications in this corpus.
Search patents in H03L- Granted patents
- 17
- Published applications
- 14
- Assignees
- 16
- Inventors
- 50
- Latest grant
- 5 Nov 2024
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1993 | 1 | 0 |
| 1994 | 0 | 0 |
| 1995 | 0 | 0 |
| 1996 | 0 | 0 |
| 1997 | 0 | 0 |
| 1998 | 0 | 0 |
| 1999 | 0 | 0 |
| 2000 | 0 | 0 |
| 2001 | 0 | 0 |
| 2002 | 0 | 0 |
| 2003 | 0 | 1 |
| 2004 | 1 | 0 |
| 2005 | 0 | 2 |
| 2006 | 2 | 1 |
| 2007 | 1 | 0 |
| 2008 | 0 | 0 |
| 2009 | 0 | 0 |
| 2010 | 0 | 0 |
| 2011 | 0 | 0 |
| 2012 | 0 | 1 |
| 2013 | 2 | 1 |
| 2014 | 0 | 0 |
| 2015 | 1 | 0 |
| 2016 | 0 | 1 |
| 2017 | 0 | 3 |
| 2018 | 3 | 0 |
| 2019 | 1 | 0 |
| 2020 | 0 | 0 |
| 2021 | 1 | 2 |
| 2022 | 3 | 0 |
| 2023 | 0 | 1 |
| 2024 | 1 | 1 |
By publication year. Applications have been published since 2001.
Recent patents
- Pulse elimination circuit, voltage detection circuit and detecting method5 Nov 2024US 12,136,928 B2Chipone Technology (Beijing) Co., Ltd.
- System reference (SYSREF) signal system and method25 Oct 2022US 11,483,005 B1IQ-Analog Corporation
- Calibration of sampling-based multiplying delay-locked loop (MDLL)9 Aug 2022US 11,411,569 B2QUALCOMM Incorporated
- Methods and apparatus to implement pulse swallowing circuitry in a phase frequency detector12 Jul 2022US 11,387,834 B1Texas Instruments Incorporated
- Techniques in phase-lock loop configuration in a computing device23 Mar 2021US 10,958,278 B2Intel Corporation
- Utilize the voltage-controlled oscillator to continuously output signal with acceptable frequency without utilizing phase lock loop10 Oct 2024US 2024/0340015 A1Horng Tong Enterprise Co., LTD
- Pulse elimination circuit, voltage detection circuit and detecting method21 Dec 2023US 2023/0412177 A1Chipone Technology (Beijing) Co., Ltd.
- Calibration of Sampling-Based Multiplying Delay-Locked Loop (MDLL)30 Dec 2021US 2021/0409029 A1QUALCOMM Incorporated
- Techniques in phase-lock loop configuration in a computing device4 Feb 2021US 2021/0036708 A1Intel Corporation
- Frequency Converter14 Dec 2017US 2017/0357556 A1Schmidhauser AG
Most cited
By later US patents
- Method of speeding up output alignment in a digital phase locked loop15US 10,069,503 B2Microsemi Semiconductor ULC · 2018
- PLL post divider phase continuity7US 9,998,129 B1QUALCOMM Incorporated · 2018
- Phase locked loop circuit having deadlock protection circuit and methods of operating same5US 7,310,009 B2Samsung Electronics Co., Ltd. · 2007
- Near-integer channel spur mitigation in a phase-locked loop5US 8,971,455 B2Texas Instruments Incorporated · 2015
- Analog implementation of spread spectrum frequency modulation in a programmable phase locked loop (PLL) system4US 7,015,764 B2Altera Corporation · 2006