H03K 19/1738
Using cascode switch logic [csl] or cascode emitter coupled logic [cecl]
Official title: {using cascode switch logic [CSL] or cascode emitter coupled logic [CECL]}
H03K19/1738 (Using cascode switch logic [csl] or cascode emitter coupled logic [cecl]) appears on 103 US grants and 30 published applications in this corpus.
Search patents in H03K- Granted patents
- 103
- Published applications
- 30
- Assignees
- 41
- Inventors
- 166
- Latest grant
- 19 Nov 2024
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1986 | 4 | 0 |
| 1987 | 5 | 0 |
| 1988 | 8 | 0 |
| 1989 | 3 | 0 |
| 1990 | 2 | 0 |
| 1991 | 5 | 0 |
| 1992 | 3 | 0 |
| 1993 | 2 | 0 |
| 1994 | 3 | 0 |
| 1995 | 4 | 0 |
| 1996 | 3 | 0 |
| 1997 | 1 | 0 |
| 1998 | 5 | 0 |
| 1999 | 3 | 0 |
| 2000 | 7 | 0 |
| 2001 | 5 | 2 |
| 2002 | 4 | 0 |
| 2003 | 4 | 3 |
| 2004 | 14 | 13 |
| 2005 | 3 | 1 |
| 2006 | 3 | 2 |
| 2007 | 0 | 3 |
| 2008 | 3 | 0 |
| 2009 | 0 | 2 |
| 2010 | 3 | 1 |
| 2011 | 1 | 0 |
| 2012 | 0 | 0 |
| 2013 | 0 | 0 |
| 2014 | 0 | 0 |
| 2015 | 0 | 0 |
| 2016 | 0 | 0 |
| 2017 | 0 | 0 |
| 2018 | 1 | 0 |
| 2019 | 1 | 0 |
| 2020 | 0 | 0 |
| 2021 | 1 | 0 |
| 2022 | 0 | 1 |
| 2023 | 1 | 0 |
| 2024 | 1 | 2 |
By publication year. Applications have been published since 2001.
Recent patents
- Multiplexer19 Nov 2024US 12,147,750 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Multiplexer4 Jul 2023US 11,694,012 B2Taiwan Semiconductor Manufacturing Company.Ltd
- On-chip memory block circuit23 Nov 2021US 11,182,110 B1Xilinx, Inc.
- Loop optimization for implementing circuit designs in hardware25 Jun 2019US 10,331,836 B1Xilinx, Inc.
- Techniques for variable latency redundancy10 Jul 2018US 10,020,812 B1Intel Corporation
- Multiplexer12 Dec 2024US 2024/0411976 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Multiplexer1 Feb 2024US 2024/0037309 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Multiplexer13 Oct 2022US 2022/0327275 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Reconfigurable logic cell made up of double-gate mosfet transistors5 Aug 2010US 2010/0194430 A1Centre National de la Recherche Scientifique (CNRS)
- Multiplexer circuit26 Mar 2009US 2009/0080465 A1Korea Advanced Institute of Science and Technology
Most cited
By later US patents
- Charge-redistribution low-swing differential logic circuit128US 6,331,791 B1Industrial Technology Research Institute · 2001
- Locally asynchronous, pipeline-able logic circuits for true-single-phase synchronous logic circuit99US 5,841,298 AIndustrial Technology Research Institute · 1998
- Clocking scheme for latching of a domino output83US 5,453,708 AIntel Corporation · 1995
- Clocked differential cascode voltage switch logic systems71US 4,570,084 AInternational Business Machines Corporation · 1986
- Charge recycling differential logic (CRDL) circuit and devices using the same69US 5,859,548 ALG Semicon Co., Ltd. · 1999