G11C 11/4093
Input/output [i/o] data interface arrangements
Official title: Input/output [I/O] data interface arrangements, e.g. data buffers
G11C11/4093 (Input/output [i/o] data interface arrangements) appears on 2,641 US grants and 2,726 published applications in this corpus.
Search patents in G11C- Granted patents
- 2,641
- Published applications
- 2,726
- Assignees
- 286
- Inventors
- 2,719
- Latest grant
- 29 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 1 | 0 |
| 1977 | 4 | 0 |
| 1978 | 6 | 0 |
| 1979 | 3 | 0 |
| 1980 | 4 | 0 |
| 1981 | 3 | 0 |
| 1982 | 2 | 0 |
| 1983 | 6 | 0 |
| 1984 | 0 | 0 |
| 1985 | 4 | 0 |
| 1986 | 3 | 0 |
| 1987 | 3 | 0 |
| 1988 | 1 | 0 |
| 1989 | 1 | 0 |
| 1990 | 1 | 0 |
| 1991 | 1 | 0 |
| 1992 | 2 | 0 |
| 1993 | 0 | 0 |
| 1994 | 4 | 0 |
| 1995 | 1 | 0 |
| 1996 | 2 | 0 |
| 1997 | 4 | 0 |
| 1998 | 8 | 0 |
| 1999 | 3 | 0 |
| 2000 | 6 | 0 |
| 2001 | 21 | 11 |
| 2002 | 35 | 41 |
| 2003 | 32 | 44 |
| 2004 | 40 | 49 |
| 2005 | 36 | 42 |
| 2006 | 36 | 45 |
| 2007 | 44 | 100 |
| 2008 | 60 | 81 |
| 2009 | 61 | 50 |
| 2010 | 56 | 39 |
| 2011 | 44 | 47 |
| 2012 | 52 | 46 |
| 2013 | 46 | 48 |
| 2014 | 61 | 53 |
| 2015 | 76 | 108 |
| 2016 | 102 | 86 |
| 2017 | 145 | 143 |
| 2018 | 132 | 129 |
| 2019 | 195 | 208 |
| 2020 | 204 | 166 |
| 2021 | 202 | 231 |
| 2022 | 197 | 212 |
| 2023 | 195 | 251 |
| 2024 | 190 | 204 |
| 2025 | 197 | 168 |
| 2026 | 109 | 124 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
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By later US patents
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- Single chip frame buffer and graphics accelerator185US 5,694,143 AAccelerix Limited · 1997
- Memory module including a plurality of integrated circuit memory devices and a plurality of buffer devices in a matrix topology143US 7,464,225 B2Rambus Inc. · 2008