G06F 7/507
Using selection between two conditionally calculated carry or sum values
Official title: using selection between two conditionally calculated carry or sum values
G06F7/507 (Using selection between two conditionally calculated carry or sum values) appears on 168 US grants and 93 published applications in this corpus.
Search patents in G06F- Granted patents
- 168
- Published applications
- 93
- Assignees
- 70
- Inventors
- 254
- Latest grant
- 11 Mar 2025
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 1 | 0 |
| 1977 | 0 | 0 |
| 1978 | 0 | 0 |
| 1979 | 1 | 0 |
| 1980 | 0 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 0 | 0 |
| 1985 | 1 | 0 |
| 1986 | 2 | 0 |
| 1987 | 5 | 0 |
| 1988 | 2 | 0 |
| 1989 | 1 | 0 |
| 1990 | 1 | 0 |
| 1991 | 5 | 0 |
| 1992 | 4 | 0 |
| 1993 | 7 | 0 |
| 1994 | 4 | 0 |
| 1995 | 1 | 0 |
| 1996 | 11 | 0 |
| 1997 | 5 | 0 |
| 1998 | 8 | 0 |
| 1999 | 15 | 0 |
| 2000 | 5 | 0 |
| 2001 | 4 | 1 |
| 2002 | 5 | 1 |
| 2003 | 1 | 7 |
| 2004 | 5 | 10 |
| 2005 | 4 | 7 |
| 2006 | 3 | 6 |
| 2007 | 5 | 0 |
| 2008 | 8 | 2 |
| 2009 | 4 | 6 |
| 2010 | 2 | 1 |
| 2011 | 1 | 1 |
| 2012 | 1 | 1 |
| 2013 | 3 | 0 |
| 2014 | 0 | 2 |
| 2015 | 1 | 2 |
| 2016 | 3 | 11 |
| 2017 | 10 | 0 |
| 2018 | 4 | 0 |
| 2019 | 3 | 14 |
| 2020 | 5 | 1 |
| 2021 | 5 | 5 |
| 2022 | 4 | 2 |
| 2023 | 4 | 6 |
| 2024 | 3 | 3 |
| 2025 | 1 | 4 |
By publication year. Applications have been published since 2001.
Recent patents
- Adder circuit using lookup tables11 Mar 2025US 12,248,764 B2Achronix Semiconductor Corporation
- Systems and methods for low latency modular multiplication5 Nov 2024US 12,135,955 B2Intel Corporation
- Secure multi-party computation and communication14 May 2024US 11,983,285 B1Lemon Inc.
- Adder circuit using lookup tables16 Apr 2024US 11,960,857 B2Achronix Semiconductor Corporation
- Secure multi-party computation and communication5 Dec 2023US 11,836,263 B1Lemon Inc.
- Signed extension carry-look-ahead for accumulator with bit width difference27 Nov 2025US 2025/0362872 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Logic gate complexity28 Aug 2025US 2025/0272464 A1Arm Limited
- Logic gate complexity28 Aug 2025US 2025/0274127 A1Arm Limited
- Adder circuit using lookup tables27 Mar 2025US 2025/0103296 A1Achronix Semiconductor Corporation
- Signed extension carry-look-ahead for accumulator with bit width difference21 Nov 2024US 2024/0385801 A1Taiwan Semiconductor Manufacturing Company.Ltd
Most cited
By later US patents
- Fast carry structure with synchronous input159US 5,546,018 AXilinx, Inc. · 1996
- Digital adder and method for adding 64-bit, 16-bit and 8-bit words94US 5,327,369 AIntel Corporation · 1994
- Floating point addition methods and apparatus86US 5,808,926 ASun Microsystems, Inc. · 1998
- Circuit for fast carry and logic70US 5,481,206 AXilinx, Inc. · 1996
- Charge recycling differential logic (CRDL) circuit and devices using the same69US 5,859,548 ALG Semicon Co., Ltd. · 1999