Digital adder and method for adding 64-bit, 16-bit and 8-bit words
AssigneeIntel Corporation
InventorYaron Ashkenazi
Life of this patent
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Abstract
An adder for a 64-bit microprocessor which has three modes of operations, specifically, a 64-bit mode, a second mode where the adder in effect is four 16-bit adders and a third mode where the adder is, in effect, eight 8-bit adders. Two levels of Kogge-Stone trees are used, the first to generate group carries and propagate signals and the second for generating the carry signals for the 64-bit case. In the case of the 8-bit and 16-bit modes, the second level Kogge-Stone tree is not used, rather ordinary logic generates the appropriate carries. Exclusive ORing for conditional sums is performed in parallel with the generation of the carry signals.
Claims20
An adder comprising:
- a first circuit coupled to receive A and B signals, each of said A and B signals comprising a plurality of bits, said first circuit logically combining said A and B signals to provide first propagate and generate signals;
- a group of second circuits each coupled to receive a plurality of said first propagate and generate signals from said first circuit, said group of second circuits providing a plurality of group propagate and generate signals;
- a third circuit coupled to said group of second circuits for providing first carry signals from said group propagate and generate signals taken as a continuous chain and second carry signals from said group propagate and generate signals taken in chains shorter than said continuous chain;
- a fourth circuit coupled to said group of second circuits and to receive said A and B signals for computing conditional sums for said A and B signals;
- a first selector coupled to said third circuit for selecting between said first carry signals and second carry signals, said first selector being controlled by an external mode signal;
- and,
- a second selector coupled to said fourth circuit and said first selector for selecting between said conditional sums, said second selector being controlled by one of said first carry signals and said second carry signals.
A 64-bit adder for adding two 64-bit digital signals, A and B, comprising:
- a first circuit coupled to receive the A and B signals for logically combining said signals to provide first propagate and generate signals;
- a group of eight Kogge-Stone trees each coupled to receive a plurality of said first propagate and first generate signals from said first circuit, said group of trees providing a plurality of group propagate and generate signals;
- a second circuit including an additional Kogge-Stone tree coupled to said group of trees for determining first carry signals when said group of eight trees are considered as a single first chain and second carry signal signals when said group of trees are considered as a plurality of second chains, each of said second chains being shorter than said first chain;
- a third circuit for computing conditional sums for said A and B signals;
- and,
- a multiplexer for selecting between said conditional sums, said multiplexer being controlled by one of said first carry signals or second carry signals.
A method for adding two numbers, A and B, each having a plurality of bits, comprising the steps of:
- generating propagate and generate terms for the numbers A and B;
- generating propagate and generate terms for groups of the propagate and generate terms for the numbers A and B;
- finding one of, first carry terms for all the groups as single chain or second carry terms for the groups considered as a plurality of chains, each shorter than the single chain;
- generating group conditional sums for at least two of the groups;
- using the first carry terms or second carry terms to select sums from the conditional sums.
A method for adding two 64-bit numbers comprising the steps of:
- generating propagate and generate terms for the two 64-bit numbers;
- grouping the propagate and generate terms for the two 64-bit numbers into eight groups;
- generating propagate and generate terms for each of the eight groups;
- finding first carry terms for the eight groups when considering the groups as a single chain;
- finding second carry terms for the eight groups when considering the groups as a plurality of chains each of which is shorter than the single chain;
- generating group conditional sums for at least two of the eight groups;
- and
- using one of said first carry terms and second carry terms to select sums from the conditional sums.
Dependencies are inferred from the claim text.