G06F 7/502
Half adders
Official title: Half adders; Full adders consisting of two cascaded half adders {(G06F7/5013 takes precedence)}
G06F7/502 (Half adders) appears on 41 US grants and 16 published applications in this corpus.
Search patents in G06F- Granted patents
- 41
- Published applications
- 16
- Assignees
- 28
- Inventors
- 68
- Latest grant
- 9 Jun 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1979 | 1 | 0 |
| 1980 | 0 | 0 |
| 1981 | 1 | 0 |
| 1982 | 1 | 0 |
| 1983 | 0 | 0 |
| 1984 | 1 | 0 |
| 1985 | 0 | 0 |
| 1986 | 0 | 0 |
| 1987 | 1 | 0 |
| 1988 | 2 | 0 |
| 1989 | 0 | 0 |
| 1990 | 1 | 0 |
| 1991 | 1 | 0 |
| 1992 | 0 | 0 |
| 1993 | 1 | 0 |
| 1994 | 1 | 0 |
| 1995 | 0 | 0 |
| 1996 | 0 | 0 |
| 1997 | 5 | 0 |
| 1998 | 2 | 0 |
| 1999 | 1 | 0 |
| 2000 | 3 | 0 |
| 2001 | 4 | 0 |
| 2002 | 0 | 0 |
| 2003 | 0 | 0 |
| 2004 | 0 | 0 |
| 2005 | 1 | 0 |
| 2006 | 0 | 0 |
| 2007 | 0 | 0 |
| 2008 | 0 | 0 |
| 2009 | 0 | 0 |
| 2010 | 0 | 1 |
| 2011 | 0 | 0 |
| 2012 | 0 | 0 |
| 2013 | 0 | 1 |
| 2014 | 0 | 0 |
| 2015 | 1 | 0 |
| 2016 | 0 | 0 |
| 2017 | 0 | 0 |
| 2018 | 0 | 1 |
| 2019 | 1 | 0 |
| 2020 | 1 | 0 |
| 2021 | 2 | 4 |
| 2022 | 4 | 4 |
| 2023 | 0 | 2 |
| 2024 | 3 | 1 |
| 2025 | 1 | 2 |
| 2026 | 1 | 0 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Triple adder9 Jun 2026US 12,650,810 B2Arm Limited
- Compressed wallace trees in FMA circuits3 Jun 2025US 12,321,714 B2Intel Corporation
- Carry-lookahead adder, secure adder and method for performing carry-lookahead addition22 Oct 2024US 12,124,816 B2Nuvoton Technology Corporation
- Dual-domain combinational logic circuitry26 Mar 2024US 11,941,369 B1Rambus Inc.
- Ternary logic circuit device9 Jan 2024US 11,868,740 B2Postech Research and Business Development Foundation
- Full adder circuit and methods for high speed computing applications21 Aug 2025US 2025/0265039 A1Samsung Electronics Co., Ltd.
- Secure adder having carry-safe adder to verify result of secure addition operation performed by secure carry-lookahead adder31 Jul 2025US 2025/0244952 A1Nuvoton Technology Corporation
- Memory device and operating method thereof6 Jun 2024US 2024/0184526 A1Samsung Electronics Co., Ltd.
- Triple adder24 Aug 2023US 2023/0266942 A1Arm Limited
- Carry-lookahead adder, secure adder and method for performing carry-lookahead addition6 Jul 2023US 2023/0214189 A1Nuvoton Technology Corporation
Most cited
By later US patents
- Null convention logic system35US 5,305,463 ATheseus Research, Inc. · 1994
- Null convention bus28US 5,796,962 ATheeus Logic · 1998
- Unified programmable computational memory and configuration network27US 10,673,440 B1Xilinx, Inc. · 2020
- Null convention threshold gate27US 5,656,948 ATheseus Research, Inc. · 1997
- Asynchronous register24US 6,052,770 ATheseus Logic, Inc. · 2000