G06F 7/492
Using a binary weighted representation within each denomination
Official title: using a binary weighted representation within each denomination {(G06F7/498 takes precedence)}
G06F7/492 (Using a binary weighted representation within each denomination) appears on 57 US grants and 30 published applications in this corpus.
Search patents in G06F- Granted patents
- 57
- Published applications
- 30
- Assignees
- 39
- Inventors
- 108
- Latest grant
- 28 Nov 2023
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 5 | 0 |
| 1977 | 4 | 0 |
| 1978 | 3 | 0 |
| 1979 | 3 | 0 |
| 1980 | 1 | 0 |
| 1981 | 2 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 1 | 0 |
| 1985 | 2 | 0 |
| 1986 | 0 | 0 |
| 1987 | 3 | 0 |
| 1988 | 2 | 0 |
| 1989 | 3 | 0 |
| 1990 | 0 | 0 |
| 1991 | 1 | 0 |
| 1992 | 2 | 0 |
| 1993 | 0 | 0 |
| 1994 | 0 | 0 |
| 1995 | 0 | 0 |
| 1996 | 0 | 0 |
| 1997 | 0 | 0 |
| 1998 | 0 | 0 |
| 1999 | 0 | 0 |
| 2000 | 0 | 0 |
| 2001 | 1 | 0 |
| 2002 | 0 | 0 |
| 2003 | 0 | 0 |
| 2004 | 0 | 1 |
| 2005 | 0 | 2 |
| 2006 | 1 | 6 |
| 2007 | 2 | 1 |
| 2008 | 2 | 1 |
| 2009 | 1 | 2 |
| 2010 | 3 | 2 |
| 2011 | 1 | 1 |
| 2012 | 2 | 1 |
| 2013 | 3 | 3 |
| 2014 | 2 | 0 |
| 2015 | 0 | 0 |
| 2016 | 0 | 0 |
| 2017 | 0 | 0 |
| 2018 | 1 | 0 |
| 2019 | 0 | 0 |
| 2020 | 1 | 4 |
| 2021 | 1 | 2 |
| 2022 | 3 | 0 |
| 2023 | 1 | 1 |
| 2024 | 0 | 2 |
| 2025 | 0 | 0 |
| 2026 | 0 | 1 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Systems and methods for energy-efficient analog matrix multiplication for machine learning processes28 Nov 2023US 11,829,864 B2Analog Devices, Inc.
- Systems and methods for energy-efficient analog matrix multiplication for machine learning processes8 Nov 2022US 11,494,625 B2Maxim Integrated Products, Inc.
- Condition code anticipator for hexadecimal floating point1 Nov 2022US 11,487,506 B2International Business Machines Corporation
- Processing element and processing system5 Apr 2022US 11,294,628 B2SK hynix Inc.
- Realization of neural networks with ternary inputs and binary weights in NAND memory arrays9 Nov 2021US 11,170,290 B2SanDisk Technologies LLC
- Binary number-based computation acceleration circuit23 Jul 2026US 2026/0211618 A1Montage Technology Co., Ltd.
- Memory device for signed multi-bit to multi-bit multiplications12 Sep 2024US 2024/0304254 A1Micron Technology, Inc.
- Techniques for error mitigation to improve reliability for analog compute-in-memory11 Jan 2024US 2024/0013850 A1Intel Corporation
- Systems and methods for energy-efficient analog matrix multiplication for machine learning processes20 Apr 2023US 2023/0121532 A1Analog Devices, Inc.
- Device and method for extraction and insertion of binary words15 Apr 2021US 2021/0109713 A1STMicroelectronics (Grenoble 2) SAS
Most cited
By later US patents
- Arithmetic unit for a digital data processor25US 4,001,570 AInternational Business Machines Corporation · 1977
- Arithmetic logic unit21US 4,559,608 AHarris Corporation · 1985
- System and method for providing a decimal multiply algorithm using a double adder20US 7,519,647 B2International Business Machines Corporation · 2009
- Transmit/receive beamforming signal generation20US 9,960,883 B1Texas Instruments Incorporated · 2018
- Binary or BCD adder with precorrected result18US 4,172,288 AMotorola, Inc. · 1979