Binary or BCD adder with precorrected result
AssigneeMotorola, Inc.
InventorJack L. Anderson
Life of this patent
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AssigneeMotorola, Inc.
InventorJack L. Anderson
Estimating the term…
An adder provides either binary or binary coded decimal operation under the selection of a control input. The data inputs are a pair of four bit operands and a carry in for providing an additional capability of greater than four bits. Outputs, in addition to the four bit result, include carry propagate and carry generate signals for the four bit group. Binary operation is conventional. For binary coded decimal operation, the adder corrects an initial binary result to the binary coded decimal format by adding six when there is a group carry generate signal present thus forming an intermediate result. This intermediate result is formed before the occurrence of the carry in from a preceding stage. In the final stage of the adder, the intermediate result is incremented to form the final four bit result if there is a carry in.
An adder circuit for forming the BCD sum of a first BCD digit and a second BCD digit comprising:
An adder circuit for forming the BCD sum of a first BCD operand and a second BCD operand comprising:
Dependencies are inferred from the claim text.