G06F 30/31
Design entry
Official title: Design entry, e.g. editors specifically adapted for circuit design
G06F30/31 (Design entry) appears on 466 US grants and 539 published applications in this corpus.
Search patents in G06F- Granted patents
- 466
- Published applications
- 539
- Assignees
- 196
- Inventors
- 1,571
- Latest grant
- 29 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1996 | 1 | 0 |
| 1997 | 0 | 0 |
| 1998 | 3 | 0 |
| 1999 | 0 | 0 |
| 2000 | 0 | 0 |
| 2001 | 0 | 0 |
| 2002 | 1 | 2 |
| 2003 | 1 | 1 |
| 2004 | 1 | 1 |
| 2005 | 1 | 3 |
| 2006 | 2 | 1 |
| 2007 | 2 | 1 |
| 2008 | 1 | 2 |
| 2009 | 1 | 1 |
| 2010 | 3 | 3 |
| 2011 | 1 | 4 |
| 2012 | 4 | 3 |
| 2013 | 6 | 11 |
| 2014 | 14 | 8 |
| 2015 | 12 | 11 |
| 2016 | 11 | 7 |
| 2017 | 12 | 3 |
| 2018 | 5 | 6 |
| 2019 | 13 | 8 |
| 2020 | 34 | 31 |
| 2021 | 44 | 44 |
| 2022 | 68 | 86 |
| 2023 | 69 | 104 |
| 2024 | 66 | 78 |
| 2025 | 55 | 67 |
| 2026 | 35 | 53 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Scalable generative AI-based tool infrastructure29 Sep 2026US 12,748,791 B2Microsoft Technology Licensing, LLC
- Adaptable framework for circuit design simulation verification29 Sep 2026US 12,748,903 B2Xilinx, Inc.
- Statistical graph circuit component probability model for an integrated circuit design29 Sep 2026US 12,748,908 B2Synopsys, Inc.
- Overlaying a canvas from distributed interactive applications22 Sep 2026US 12,743,566 B1Cadence Design Systems, Inc.
- Systems and methods for designing a discrete device product22 Sep 2026US 12,743,567 B2Semiconductor Components Industries, LLC
- Interactively presenting for minimum overlap shapes in an ic design8 Oct 2026US 2026/0310865 A1D2S, Inc.
- Transformer-based end-to-end hotspot detection method for integrated circuit layouts8 Oct 2026US 2026/0310872 A1Nanjing University
- Graphic data generation method, graphic data generation device, quantum beam writing method, quantum beam writing device, and computer-readable recording medium1 Oct 2026US 2026/0299431 A1NuFlare Technology, Inc.
- Reset testing in a processor design environment24 Sep 2026US 2026/0289058 A1
- Method, apparatus, electronic device, and product for determining circuit element layout24 Sep 2026US 2026/0289064 A1Robert Bosch GmbH
Most cited
By later US patents
- Method and system for creating and validating low level description of electronic design from higher level, behavior-oriented description, including interactive system for hierarchical display of control and dataflow information324US 5,801,958 ALSI Logic Corporation · 1998
- Method and system for creating and validating low level description of electronic design from higher level, behavior-oriented description, including interactive system for hierarchical display of control and dataflow information226US 5,555,201 ALSI Logic Corporation · 1996
- Method and apparatus for partial reconfiguration circuit design for a programmable device79US 7,640,527 B1Xilinx, Inc. · 2009
- Chip management system63US 7,024,636 B2LSI Logic Corporation · 2006
- Resource sharing workflows within executable graphical models52US 8,694,947 B1The MathWorks, Inc. · 2014