Method, apparatus, electronic device, and product for determining circuit element layout

Abstract

A method, apparatus, electronic device, and product for determining a circuit element layout are disclosed. The method includes (i) determining multiple candidate layouts for multiple circuit elements based on layout information of the multiple circuit elements in a printed circuit board, (ii) determining respective multiple wiring lengths, multiple element overlap areas, and multiple wiring congestion levels for the multiple candidate layouts, (iii) determining a target layout from the multiple candidate layouts based on the multiple wiring lengths, the multiple element overlap areas, and the multiple wiring congestion levels. In this way, by simultaneously considering wiring length, overlap area, and congestion level, a layout with good performance can be obtained, thereby avoiding subsequent manual intervention.

Dependencies are inferred from the claim text.