G06F 2212/68
Details of translation look-aside buffer [tlb]
Official title: Details of translation look-aside buffer [TLB]
G06F2212/68 (Details of translation look-aside buffer [tlb]) appears on 1,353 US grants and 1,392 published applications in this corpus.
Search patents in G06F- Granted patents
- 1,353
- Published applications
- 1,392
- Assignees
- 187
- Inventors
- 2,045
- Latest grant
- 8 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1987 | 2 | 0 |
| 1988 | 3 | 0 |
| 1989 | 0 | 0 |
| 1990 | 0 | 0 |
| 1991 | 0 | 0 |
| 1992 | 0 | 0 |
| 1993 | 2 | 0 |
| 1994 | 3 | 0 |
| 1995 | 5 | 0 |
| 1996 | 4 | 0 |
| 1997 | 3 | 0 |
| 1998 | 9 | 0 |
| 1999 | 10 | 0 |
| 2000 | 6 | 0 |
| 2001 | 6 | 0 |
| 2002 | 10 | 15 |
| 2003 | 7 | 3 |
| 2004 | 14 | 15 |
| 2005 | 10 | 11 |
| 2006 | 8 | 19 |
| 2007 | 15 | 22 |
| 2008 | 12 | 16 |
| 2009 | 17 | 22 |
| 2010 | 17 | 16 |
| 2011 | 11 | 15 |
| 2012 | 23 | 13 |
| 2013 | 23 | 33 |
| 2014 | 18 | 66 |
| 2015 | 51 | 61 |
| 2016 | 83 | 133 |
| 2017 | 117 | 150 |
| 2018 | 125 | 153 |
| 2019 | 162 | 158 |
| 2020 | 144 | 106 |
| 2021 | 96 | 64 |
| 2022 | 94 | 77 |
| 2023 | 78 | 77 |
| 2024 | 74 | 66 |
| 2025 | 67 | 45 |
| 2026 | 24 | 36 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Shared translation page tables for ownership transfer8 Sep 2026US 12,730,660 B1Amazon Technologies, Inc.
- Method and apparatus for permuting streamed data elements8 Sep 2026US 12,730,758 B2Texas Instruments Incorporated
- Apparatus and method for adjusting cache allocated for read look ahead11 Aug 2026US 12,705,174 B2SK hynix Inc.
- Using retired pages history for instruction translation lookaside buffer (TLB) prefetching in processor-based devices11 Aug 2026US 12,705,184 B2QUALCOMM Incorporated
- Coordinated allocation of external memory16 Jun 2026US 12,656,966 B2Kove IP, LLC
- Prefetch circuitry for page table entry streaming1 Oct 2026US 2026/0300185 A1Intel Corporation
- Method, system, and apparatus for page sizing extension3 Sep 2026US 2026/0259833 A1UNM Rainforest Innovations
- Application space filtering for tlb invalidation3 Sep 2026US 2026/0259834 A1Google Inc.
- Optimizing smmu cache invalidation27 Aug 2026US 2026/0252493 A1QUALCOMM Incorporated
- Techniques for performing hardware address sanitization for memory using address tagging27 Aug 2026US 2026/0252495 A1QUALCOMM Incorporated
Most cited
By later US patents
- Computing in parallel processing environments463US 8,738,860 B1Tilera Corporation · 2014
- Apparatus and method for TLB purge reduction in a multi-level machine system246US 5,317,705 AInternational Business Machines Corporation · 1994
- Data reduction techniques in a flash-based key/value cluster storage200US 9,606,870 B1EMC IP Holding Company LLC · 2017
- Selective guest system purge control152US 4,779,188 AInternational Business Machines Corporation · 1988
- Efficient performance based scheduling mechanism for handling multiple TLB operations138US 6,728,800 B1Intel Corporation · 2004