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US 2026/0259833 A1Published application
Method, system, and apparatus for page sizing extension
AssigneeUNM Rainforest Innovations
InventorsEdward GROCHOWSKI, Julio GAGO, Roger GRAMUNT, Roger ESPASA, Rolf KASSA
Life of this patent
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Abstract
A method, system, and apparatus may initialize a fixed plurality of page table entries for a fixed plurality of pages in memory, each page having a first size, wherein a linear address for each page table entry corresponds to a physical address and the fixed plurality of pages are aligned. A bit in each of the page table entries for the aligned pages may be set to indicate whether or not the fixed plurality of pages is to be treated as one combined page having a second page size larger than the first page size. Other embodiments are described and claimed.
Claims30
A processor comprising:
- a register configured to store a base address of a first translation table of a plurality of translation tables, the plurality of translation tables configured to map virtual memory to physical memory;
- and
- a translation table walker configured to look up a first entry in the plurality of translation tables, wherein
- the first entry includes a first physical address of a second translation table, and
- a second entry in a last table of the plurality of translation tables includes a second physical address of a page and controls, the controls including a bit configured to indicate that the page is a pre-selected size, the bit configured to indicate that the page is built from pages that are of a size different from the pre-selected size, the bit configured to indicate a presence of the page of the pre-selected size in memory beginning at a page base address indicated by an address field.
2 more elements
A processor comprising:
- a register configured to store a base address of a first translation table of a plurality of translation tables, the plurality of translation tables configured to map virtual memory to physical memory;
- and
- a translation table walker configured to look up a first entry in the first translation table, a second entry in a second translation table, a third entry in a third translation table, and a fourth entry in a fourth translation table, wherein
- the first entry includes a first physical address of the second translation table, the second entry includes a second physical address of the third translation table, the third entry includes a third physical address of the fourth translation table, and the fourth entry includes a fourth physical address of a page and controls, the controls including a bit configured to indicate that the page is a pre-selected size, the bit being configured to indicate that the page is built from pages of a size different from the pre-selected size, the bit configured to indicate a presence of the page of the pre-selected size in memory beginning at a page base address indicated by an address field.
1 more element
A method compromising:
- performing, by a translation table walker, a lookup of a first entry in a first translation table of a plurality of translation tables, the plurality of translation tables configured to map virtual memory to physical memory, wherein a base address of the first translation table is stored in a register, and the first entry includes a first physical address of a second translation table;
- and
- performing, by the translation table walker, a lookup of a second entry in a last translation table of the plurality of translation tables, wherein the second entry includes a second physical address of a page and controls including a bit configured to indicate that the page is a pre-selected size, the bit configured to indicate that the page is from pages of a size different from the pre-selected size, the bit configured to indicate a presence of the page of the pre-selected size in memory beginning at a page base address indicated by an address field.
A system comprising:
- a physical memory;
- and
- a processor comprising:
- a register configured to store a base address of a first translation table of a plurality of translation tables, the plurality of translation tables to map virtual memory to the physical memory;
- and
- a translation table walker configured to look up a first entry in the first translation table, the translation table walker configured to look up a second entry in a last translation table of the plurality of translation tables, wherein
- the first entry includes a first physical address of a second translation table, and the second entry includes a second physical address of a page, and
- the second entry includes controls, the controls include a bit configured to indicate that the page is a pre-selected size, the bit configured to indicate that the page is built from pages that are of a size different from the pre-selected size.
5 more elements
Dependencies are inferred from the claim text.