G06F 12/0831
Using a bus scheme
Official title: using a bus scheme, e.g. with bus monitoring or watching means
G06F12/0831 (Using a bus scheme) appears on 3,043 US grants and 2,628 published applications in this corpus.
Search patents in G06F- Granted patents
- 3,043
- Published applications
- 2,628
- Assignees
- 385
- Inventors
- 4,076
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1977 | 1 | 0 |
| 1978 | 0 | 0 |
| 1979 | 1 | 0 |
| 1980 | 0 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 3 | 0 |
| 1985 | 2 | 0 |
| 1986 | 0 | 0 |
| 1987 | 2 | 0 |
| 1988 | 3 | 0 |
| 1989 | 4 | 0 |
| 1990 | 4 | 0 |
| 1991 | 9 | 0 |
| 1992 | 10 | 0 |
| 1993 | 18 | 0 |
| 1994 | 30 | 0 |
| 1995 | 27 | 0 |
| 1996 | 48 | 0 |
| 1997 | 60 | 0 |
| 1998 | 73 | 0 |
| 1999 | 71 | 0 |
| 2000 | 64 | 0 |
| 2001 | 59 | 10 |
| 2002 | 89 | 52 |
| 2003 | 74 | 91 |
| 2004 | 68 | 73 |
| 2005 | 66 | 70 |
| 2006 | 67 | 113 |
| 2007 | 43 | 77 |
| 2008 | 77 | 104 |
| 2009 | 73 | 99 |
| 2010 | 72 | 66 |
| 2011 | 63 | 57 |
| 2012 | 80 | 52 |
| 2013 | 59 | 77 |
| 2014 | 91 | 153 |
| 2015 | 134 | 181 |
| 2016 | 190 | 170 |
| 2017 | 178 | 147 |
| 2018 | 149 | 155 |
| 2019 | 167 | 145 |
| 2020 | 163 | 149 |
| 2021 | 150 | 107 |
| 2022 | 116 | 122 |
| 2023 | 113 | 120 |
| 2024 | 109 | 99 |
| 2025 | 115 | 88 |
| 2026 | 48 | 51 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Multi-cache based digital output generation6 Oct 2026US 12,754,843 B2Aux Mode Inc.
- Scalable system on a chip15 Sep 2026US 12,737,296 B2Apple Inc.
- Distributed virtual memory management8 Sep 2026US 12,730,754 B1Arm Limited
- Method of forming ferroelectric chiplet in a multi-dimensional packaging with I/O switch embedded in a substrate or interposer25 Aug 2026US 12,717,479 B2Kepler Computing Inc.
- Stashing specific merge end trigger for stashing merged data25 Aug 2026US 12,717,580 B2Arm Limited
- Coherency point move for link down1 Oct 2026US 2026/0300179 A1International Business Machines Corporation
- Cache coherence shared state suppression24 Sep 2026US 2026/0288640 A1
- I/O Agent17 Sep 2026US 2026/0277804 A1Apple Inc.
- Hardware assisted Page Migration in a Multi-Dielet Processing System17 Sep 2026US 2026/0277809 A1NVIDIA Corporation
- Merging data for write allocate10 Sep 2026US 2026/0267679 A1
Most cited
By later US patents
- Computing in parallel processing environments463US 8,738,860 B1Tilera Corporation · 2014
- Symmetrical multiprocessing bus and chipset used for coprocessor support allowing non-native code to run in a system440US 6,308,255 B1Advanced Micro Devices, Inc. · 2001
- Managing cache coherency in a data processing apparatus437US 7,937,535 B2Arm Limited · 2011
- System for achieving atomic non-sequential multi-word operations in shared memory261US 5,428,761 ADigital Equipment Corporation · 1995
- Computer system and method for maintaining memory consistency in a pipelined, non-blocking caching bus request queue232US 5,623,628 AIntel Corporation · 1997