G06F 12/0835
For main memory peripheral accesses
Official title: {for main memory peripheral accesses (e.g. I/O or DMA)}
G06F12/0835 (For main memory peripheral accesses) appears on 448 US grants and 351 published applications in this corpus.
Search patents in G06F- Granted patents
- 448
- Published applications
- 351
- Assignees
- 131
- Inventors
- 982
- Latest grant
- 25 Aug 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1985 | 1 | 0 |
| 1986 | 0 | 0 |
| 1987 | 1 | 0 |
| 1988 | 0 | 0 |
| 1989 | 2 | 0 |
| 1990 | 2 | 0 |
| 1991 | 1 | 0 |
| 1992 | 2 | 0 |
| 1993 | 2 | 0 |
| 1994 | 5 | 0 |
| 1995 | 4 | 0 |
| 1996 | 15 | 0 |
| 1997 | 20 | 0 |
| 1998 | 15 | 0 |
| 1999 | 22 | 0 |
| 2000 | 12 | 0 |
| 2001 | 7 | 2 |
| 2002 | 13 | 11 |
| 2003 | 9 | 8 |
| 2004 | 13 | 10 |
| 2005 | 5 | 16 |
| 2006 | 9 | 15 |
| 2007 | 10 | 8 |
| 2008 | 11 | 6 |
| 2009 | 6 | 12 |
| 2010 | 8 | 10 |
| 2011 | 8 | 6 |
| 2012 | 2 | 8 |
| 2013 | 6 | 8 |
| 2014 | 13 | 17 |
| 2015 | 17 | 15 |
| 2016 | 21 | 20 |
| 2017 | 16 | 9 |
| 2018 | 13 | 15 |
| 2019 | 16 | 17 |
| 2020 | 18 | 17 |
| 2021 | 31 | 26 |
| 2022 | 19 | 19 |
| 2023 | 19 | 34 |
| 2024 | 23 | 19 |
| 2025 | 25 | 19 |
| 2026 | 6 | 4 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Disaggregated hypervisor25 Aug 2026US 12,717,711 B1NVIDIA Corporation
- Architecture, system and methods thereof for secure computing using hardware security classifications2 Jun 2026US 12,645,611 B2Lempel Mordkhai
- I/O agent19 May 2026US 12,632,384 B2Apple Inc.
- Electronic device including access control identifiers for controlling access to peripherals31 Mar 2026US 12,591,694 B2Microchip Technology Incorporated
- Efficient chip-to-chip communications24 Mar 2026US 12,585,604 B2NVIDIA Corporation
- I/O Agent17 Sep 2026US 2026/0277804 A1Apple Inc.
- Method to perform adapter snoop in hardware using split structure cache for snoop data constructs18 Jun 2026US 2026/0169920 A1International Business Machines Corporation
- Distributed user mode processing23 Apr 2026US 2026/0111263 A1Advanced Micro Devices, Inc.
- Soft error protection for unhardened processors19 Mar 2026US 2026/0079843 A1National Technology & Engineering Solutions of Sandia, LLC
- Multi-device cached commands in a network30 Oct 2025US 2025/0335361 A1
Most cited
By later US patents
- User scheduled direct memory access using virtual addresses219US 5,301,287 AHewlett-Packard Company · 1994
- Multimedia computer architecture with multi-channel concurrent memory access203US 6,076,139 ACompaq Computer Corporation · 2000
- Method for data bus snooping in a data processing system by selective concurrent read and invalidate cache operation176US 5,119,485 AMotorola, Inc. · 1992
- Partial cache line write transactions in a computing system with a write back cache123US 5,586,297 AHewlett-Packard Company · 1996
- Write back cache coherency module for systems with a write through cache supporting bus111US 5,555,398 AIntel Corporation · 1996