G06F 11/1048
Using arrangements adapted for a specific error detection or correction feature
Official title: {using arrangements adapted for a specific error detection or correction feature}
G06F11/1048 (Using arrangements adapted for a specific error detection or correction feature) appears on 4,482 US grants and 4,815 published applications in this corpus.
Search patents in G06F- Granted patents
- 4,482
- Published applications
- 4,815
- Assignees
- 551
- Inventors
- 5,854
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1977 | 2 | 0 |
| 1978 | 4 | 0 |
| 1979 | 0 | 0 |
| 1980 | 2 | 0 |
| 1981 | 1 | 0 |
| 1982 | 6 | 0 |
| 1983 | 5 | 0 |
| 1984 | 3 | 0 |
| 1985 | 10 | 0 |
| 1986 | 1 | 0 |
| 1987 | 6 | 0 |
| 1988 | 2 | 0 |
| 1989 | 7 | 0 |
| 1990 | 6 | 0 |
| 1991 | 7 | 0 |
| 1992 | 1 | 0 |
| 1993 | 8 | 0 |
| 1994 | 8 | 0 |
| 1995 | 10 | 0 |
| 1996 | 14 | 0 |
| 1997 | 10 | 0 |
| 1998 | 10 | 0 |
| 1999 | 22 | 0 |
| 2000 | 21 | 0 |
| 2001 | 16 | 7 |
| 2002 | 13 | 17 |
| 2003 | 10 | 19 |
| 2004 | 12 | 13 |
| 2005 | 14 | 23 |
| 2006 | 18 | 26 |
| 2007 | 19 | 34 |
| 2008 | 31 | 20 |
| 2009 | 19 | 36 |
| 2010 | 22 | 57 |
| 2011 | 29 | 90 |
| 2012 | 55 | 106 |
| 2013 | 124 | 164 |
| 2014 | 157 | 237 |
| 2015 | 247 | 272 |
| 2016 | 259 | 255 |
| 2017 | 242 | 271 |
| 2018 | 251 | 295 |
| 2019 | 315 | 408 |
| 2020 | 385 | 427 |
| 2021 | 426 | 427 |
| 2022 | 434 | 377 |
| 2023 | 415 | 365 |
| 2024 | 365 | 372 |
| 2025 | 270 | 268 |
| 2026 | 168 | 229 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Decoder circuit, flash memory controller, and decoding method6 Oct 2026US 12,754,800 B2Silicon Motion, Inc.
- Dynamic key reassignment for memory encryption keys6 Oct 2026US 12,756,553 B2International Business Machines Corporation
- Data storage device29 Sep 2026US 12,748,559 B2SK hynix Inc.
- Error management of memory devices29 Sep 2026US 12,748,658 B2Micron Technology, Inc.
- Data writing method and processing system29 Sep 2026US 12,748,659 B2Huawei Technologies Co., Ltd.
- Inserting null vectors into a stream of vectors8 Oct 2026US 2026/0310466 A1Texas Instruments Incorporated
- Command address error control8 Oct 2026US 2026/0310547 A1Micron Technology, Inc.
- Handling parity data during data folding in a memory device8 Oct 2026US 2026/0310550 A1
- Artificial intelligence model on silicon with error-correcting code logic1 Oct 2026US 2026/0300089 A1Intel Corporation
- Configurable data bus inversion operation1 Oct 2026US 2026/0300090 A1Micron Technology, Inc.
Most cited
By later US patents
- Apparatus for synchronously generating clock signals in a data processing system430US 5,243,703 ARambus Inc. · 1993
- Use of hashing function to distinguish random and repeat errors in a memory system419US 8,347,154 B2International Business Machines Corporation · 2013
- Apparatus, system, and method for power reduction in a storage device416US 8,429,436 B2Fusion-Io, Inc. · 2013
- Throughput-sensitive redundancy encoding schemes for data storage406US 8,850,288 B1Amazon Technologies, Inc. · 2014
- Method and apparatus for distributed reconstruct in a raid system380US 8,086,911 B1NetApp, Inc. · 2011