Artificial intelligence model on silicon with error-correcting code logic
AssigneeIntel Corporation
InventorsYaron Klein, Dan Horovitz, Yuval Vered, Yoni Elron
Life of this patent
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AssigneeIntel Corporation
InventorsYaron Klein, Dan Horovitz, Yuval Vered, Yoni Elron
Estimating the term…
A neural network model, e.g., a large language model, may be embedded into an apparatus including a memory layer and a logic layer. The memory layer stores encrypted data of the model, e.g., encrypted weights or tokens, and layer-specific decryption keys. The logic layer may include an ECC module and compute units. When data of a layer is written into a memory bank, the ECC module may generate an ECC codeword from the data, decrypt the ECC codeword with layer decryption key(s), and write the decrypted ECC codeword into the memory bank. When the data is read from the memory bank, the ECC module may detect or correct error(s) in the data based on the decrypted ECC codeword. The decrypted ECC codeword may be transmitted from the register to the decoder through a plurality of clock cycles. One or more compute units may perform multiply-accumulation operations on the corrected data.
An apparatus for neural network inference, the apparatus comprising:
One or more non-transitory computer-readable media storing instructions executable to perform operations for neural network inference, the operations comprising:
An apparatus for neural network inference, the apparatus comprising:
Dependencies are inferred from the claim text.