G06F 11/1052
Bypassing or disabling error detection or correction
Official title: {Bypassing or disabling error detection or correction}
G06F11/1052 (Bypassing or disabling error detection or correction) appears on 155 US grants and 147 published applications in this corpus.
Search patents in G06F- Granted patents
- 155
- Published applications
- 147
- Assignees
- 85
- Inventors
- 323
- Latest grant
- 28 Apr 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1977 | 1 | 0 |
| 1978 | 1 | 0 |
| 1979 | 0 | 0 |
| 1980 | 0 | 0 |
| 1981 | 1 | 0 |
| 1982 | 1 | 0 |
| 1983 | 0 | 0 |
| 1984 | 1 | 0 |
| 1985 | 0 | 0 |
| 1986 | 0 | 0 |
| 1987 | 0 | 0 |
| 1988 | 1 | 0 |
| 1989 | 0 | 0 |
| 1990 | 1 | 0 |
| 1991 | 1 | 0 |
| 1992 | 0 | 0 |
| 1993 | 2 | 0 |
| 1994 | 1 | 0 |
| 1995 | 3 | 0 |
| 1996 | 2 | 0 |
| 1997 | 3 | 0 |
| 1998 | 0 | 0 |
| 1999 | 3 | 0 |
| 2000 | 2 | 0 |
| 2001 | 3 | 0 |
| 2002 | 2 | 3 |
| 2003 | 2 | 3 |
| 2004 | 0 | 2 |
| 2005 | 4 | 2 |
| 2006 | 0 | 5 |
| 2007 | 0 | 8 |
| 2008 | 8 | 3 |
| 2009 | 3 | 4 |
| 2010 | 5 | 2 |
| 2011 | 1 | 2 |
| 2012 | 2 | 6 |
| 2013 | 3 | 4 |
| 2014 | 6 | 7 |
| 2015 | 11 | 13 |
| 2016 | 3 | 6 |
| 2017 | 8 | 8 |
| 2018 | 10 | 9 |
| 2019 | 7 | 4 |
| 2020 | 9 | 8 |
| 2021 | 13 | 16 |
| 2022 | 7 | 10 |
| 2023 | 10 | 2 |
| 2024 | 7 | 6 |
| 2025 | 5 | 8 |
| 2026 | 2 | 6 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Semiconductor device with user defined operations and associated methods and systems28 Apr 2026US 12,613,770 B2
- Methods and apparatus for dynamically adjusting performance of partitioned memory24 Feb 2026US 12,562,206 B2Micron Technology, Inc.
- DRAM ECC circuit error detection integrity23 Dec 2025US 12,505,014 B1Advanced Micro Devices, Inc.
- Memory chips and operating methods thereof12 Aug 2025US 12,386,698 B2
- Error correction memory device with fast data access15 Jul 2025US 12,360,848 B2Micron Technology, Inc.
- Semiconductor device with user defined operations and associated methods and systems10 Sep 2026US 2026/0267734 A1Lodestar Licensing Group LLC
- Methods and apparatus for dynamically adjusting performance of partitioned memory2 Jul 2026US 2026/0188375 A1Micron Technology, Inc.
- Error correction coding decode bypass21 May 2026US 2026/0140821 A1Micron Technology, Inc.
- Storage device and method of block reclaim in the same23 Apr 2026US 2026/0112442 A1Samsung Electronics Co., Ltd.
- Dram ecc circuit error detection integrity2 Apr 2026US 2026/0093581 A1Advanced Micro Devices, Inc.
Most cited
By later US patents
- Conditional bypass of error correction for dual memory access time selection174US 4,112,502 ASperry Rand Corporation · 1978
- Memory card, computer system and method of operation for differentiating the use of read-modify-write cycles in operating and initializaiton modes154US 5,488,691 AInternational Business Machines Corporation · 1996
- System for a distributed column chunk data store148US 7,447,839 B2Yahoo! Inc. · 2008
- Reconfigurable memory with selectable error correction storage136US 6,584,543 B2Micron Technology, Inc. · 2003
- Conditional bypass of error correction for dual memory access time selection100US 4,058,851 ASperry Rand Corporation · 1977