A memory card which interfaces with a computer system that has an operating mode and an initialization mode, the computer system and said card configured to write and store multiple byte data words at a given address, system configured to write all of the bytes of said data word or write less than all of the bytes of said data word selectively to memory and being free of error correction code capabilities and being capable of providing varying wail states for memory write operations, and the computer system configured to provide sufficient cycle time for logic elements provided perform read-modify-write operation to memory, and the computer system using read-modify-write cycles when in the initialization mode;
- said memory card comprising;
- check bit logic to generate check bits and write logic to write data words and associated check bits to a selected memory location on said card;
- detector logic to detect when less than all of the data bytes are to be rewritten to a selected address and to initiate a read-modify-write cycle;
- read-modify-write logic to perform a read-modify-write cycle wherein (a) data bytes at the given address that are not to be rewritten are read from memory and multiplexed with bytes that are to be rewritten, (b) check bits are generated from the multiplexed bytes and (c) the multiplexed data bytes and check bits are written to memory,
- said read-modify-write logic including delay logic to generate a delay in the write cycle for a sufficient time to read said data bytes from memory, multiplex said read data bytes with the newly written data bytes and write the multiplexed data bytes and check bits to memory;
- read logic to read the data bytes and check bits from memory;
- error correction code logic to generate syndrome bits and correct all one bit errors when the computer system is in the operating mode;
- and
- blocking logic to block reporting or correcting of any errors detected when the computer system is in the initialization mode.