Configurable data bus inversion operation
AssigneeMicron Technology, Inc.
InventorsAaron P. BOEHM, Steffen BUCH
Life of this patent
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Abstract
In some implementations, a memory apparatus may obtain a data bus inversion (DBI) configuration indicating a first quantity of DBI bits to be used for a DBI operation. The memory apparatus may obtain a first data packet. The memory apparatus may obtain feature information that includes one or more first DBI bits of a second quantity, wherein the second quantity is based on the first quantity of DBI bits, and wherein the feature information includes a third quantity of bits for one or more memory features. The memory apparatus may process the first data packet based on the feature information.
Claims24
A memory apparatus, comprising:
- one or more components configured to:
- obtain, from a host system, a data bus inversion (DBI) configuration indicating a first quantity of DBI bits to be used for a DBI operation;
- obtain, from the host system, a data packet;
- obtain, from the host system, one or more DBI bits of a second quantity, wherein the second quantity is equal to the first quantity of DBI bits;
- and
- process the data packet based on the one or more DBI bits and based on the first quantity of DBI bits.
A method, comprising:
- obtaining, by a memory apparatus and from a host system, a data bus inversion (DBI) configuration indicating a first quantity of DBI bits to be used for a DBI operation;
- obtaining, by the memory apparatus and from the host system, a first data packet;
- obtaining, by the memory apparatus from the host system, feature information that includes one or more first DBI bits of a second quantity, wherein the second quantity is based on the first quantity of DBI bits, and wherein the feature information includes a third quantity of bits for one or more memory features;
- and
- processing, by the memory apparatus, the first data packet based on the feature information.
A system, comprising:
- a host system configured to:
- program a data bus inversion (DBI) configuration for a memory apparatus, wherein the DBI configuration indicates a quantity of DBI bits to be used for a DBI operation;
- provide, to the memory apparatus, a data packet;
- and
- provide, to the memory apparatus, one or more DBI bits for the DBI operation and for the data packet, wherein the one or more DBI bits have the quantity of DBI bits.
Dependencies are inferred from the claim text.