G06F 11/1028
Adjacent errors
Official title: {Adjacent errors, e.g. error in n-bit (n>1) wide storage units, i.e. package error}
G06F11/1028 (Adjacent errors) appears on 149 US grants and 73 published applications in this corpus.
Search patents in G06F- Granted patents
- 149
- Published applications
- 73
- Assignees
- 68
- Inventors
- 232
- Latest grant
- 22 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1977 | 1 | 0 |
| 1978 | 2 | 0 |
| 1979 | 0 | 0 |
| 1980 | 0 | 0 |
| 1981 | 0 | 0 |
| 1982 | 2 | 0 |
| 1983 | 0 | 0 |
| 1984 | 2 | 0 |
| 1985 | 3 | 0 |
| 1986 | 3 | 0 |
| 1987 | 3 | 0 |
| 1988 | 1 | 0 |
| 1989 | 6 | 0 |
| 1990 | 2 | 0 |
| 1991 | 2 | 0 |
| 1992 | 2 | 0 |
| 1993 | 2 | 0 |
| 1994 | 3 | 0 |
| 1995 | 5 | 0 |
| 1996 | 7 | 0 |
| 1997 | 3 | 0 |
| 1998 | 9 | 0 |
| 1999 | 6 | 0 |
| 2000 | 3 | 0 |
| 2001 | 3 | 1 |
| 2002 | 6 | 3 |
| 2003 | 4 | 1 |
| 2004 | 2 | 1 |
| 2005 | 2 | 4 |
| 2006 | 3 | 1 |
| 2007 | 1 | 2 |
| 2008 | 1 | 2 |
| 2009 | 1 | 2 |
| 2010 | 2 | 3 |
| 2011 | 0 | 4 |
| 2012 | 4 | 8 |
| 2013 | 7 | 3 |
| 2014 | 7 | 7 |
| 2015 | 11 | 6 |
| 2016 | 1 | 4 |
| 2017 | 7 | 1 |
| 2018 | 1 | 3 |
| 2019 | 2 | 2 |
| 2020 | 2 | 6 |
| 2021 | 4 | 2 |
| 2022 | 2 | 1 |
| 2023 | 4 | 2 |
| 2024 | 1 | 2 |
| 2025 | 3 | 1 |
| 2026 | 1 | 1 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Transmission failure feedback schemes for reducing crosstalk22 Sep 2026US 12,743,338 B2
- Memory address translation for data protection and recovery5 Aug 2025US 12,379,994 B2Micron Technology, Inc.
- Error processing and correction of adjacent 2-bit errors27 May 2025US 12,316,346 B2Infineon Technologies AG
- Memory cell array unit4 Mar 2025US 12,242,340 B2Sony Semiconductor Solutions Corporation
- Transmission failure feedback schemes for reducing crosstalk22 Oct 2024US 12,124,329 B2
- Fault processing method and computing device19 Feb 2026US 2026/0050512 A1xFusion Digital Technologies Co., Ltd
- Transmission failure feedback schemes for reducing crosstalk9 Jan 2025US 2025/0013530 A1Lodestar Licensing Group LLC
- Transmission failure feedback schemes for reducing crosstalk21 Mar 2024US 2024/0095119 A1Micron Technology, Inc.
- Error processing and correction of adjacent 2-bit errors8 Feb 2024US 2024/0048159 A1Infineon Technologies AG
- Memory address translation for data protection and recovery7 Dec 2023US 2023/0393939 A1Micron Technology, Inc.
Most cited
By later US patents
- Sync suppression scrambling of television signals for subscription TV147US 4,466,017 AScientific-Atlanta, Inc. · 1984
- Smart memory card architecture and interface142US 4,888,773 AInternational Business Machines Corporation · 1989
- Memory module with offset data lines and bit line swizzle configuration108US 6,839,266 B1Rambus Inc. · 2005
- Error correcting code retrofit method and apparatus for multiple memory configurations101US 6,009,548 AInternational Business Machines Corporation · 1999
- Memory error correction using redundant sliced memory and standard ECC mechanisms92US 6,397,365 B1Hewlett-Packard Company · 2002