G06F 1/3237
By disabling clock generation or distribution
Official title: by disabling clock generation or distribution
G06F1/3237 (By disabling clock generation or distribution) appears on 1,146 US grants and 1,249 published applications in this corpus.
Search patents in G06F- Granted patents
- 1,146
- Published applications
- 1,249
- Assignees
- 356
- Inventors
- 2,431
- Latest grant
- 22 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1990 | 1 | 0 |
| 1991 | 0 | 0 |
| 1992 | 0 | 0 |
| 1993 | 1 | 0 |
| 1994 | 2 | 0 |
| 1995 | 5 | 0 |
| 1996 | 5 | 0 |
| 1997 | 13 | 0 |
| 1998 | 11 | 0 |
| 1999 | 22 | 0 |
| 2000 | 15 | 0 |
| 2001 | 20 | 1 |
| 2002 | 17 | 26 |
| 2003 | 23 | 56 |
| 2004 | 33 | 49 |
| 2005 | 29 | 38 |
| 2006 | 41 | 45 |
| 2007 | 46 | 42 |
| 2008 | 33 | 36 |
| 2009 | 33 | 41 |
| 2010 | 32 | 37 |
| 2011 | 38 | 46 |
| 2012 | 37 | 42 |
| 2013 | 42 | 61 |
| 2014 | 51 | 47 |
| 2015 | 46 | 54 |
| 2016 | 60 | 64 |
| 2017 | 61 | 43 |
| 2018 | 45 | 49 |
| 2019 | 56 | 61 |
| 2020 | 51 | 42 |
| 2021 | 51 | 44 |
| 2022 | 57 | 49 |
| 2023 | 44 | 57 |
| 2024 | 47 | 58 |
| 2025 | 53 | 38 |
| 2026 | 25 | 123 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Power savings by register insertion in large combinational circuits22 Sep 2026US 12,743,119 B2Altera Corporation
- Segment clock gating22 Sep 2026US 12,743,121 B2Advanced Micro Devices, Inc.
- Energy efficiency using a power saving clock buffer for clock grid-based scanning22 Sep 2026US 12,743,145 B2International Business Machines Corporation
- Processors having core control circuits to control core transitions between low power modes and related methods15 Sep 2026US 12,737,029 B2QUALCOMM Incorporated
- Adaptive local throttle management of processing circuits based on detected states in an integrated circuit (IC) chip25 Aug 2026US 12,717,373 B2QUALCOMM Incorporated
- Reactive power rail voltage droop management13 Aug 2026US 2026/0236078 A1QUALCOMM Incorporated
- Simultaneous Silicon Spring and Chip Singulation DRIE13 Aug 2026US 2026/0239987 A1
- High Current Column Grid Array Pillars13 Aug 2026US 2026/0240010 A1
- Low-latency word alignment for serdes interfaces using inline patterns30 Jul 2026US 2026/0219701 A1QUALCOMM Incorporated
- Targeted Jet-Cooling System for Zetta-Scale Computing Assemblies16 Jul 2026US 2026/0202891 A1
Most cited
By later US patents
- Apparatus for reducing computer system power consumption303US 4,980,836 ACompaq Computer Corporation · 1990
- CPU power management based on utilization with lowest performance mode at the mid-utilization range283US 6,829,713 B2Intel Corporation · 2004
- Reducing computing system power through idle synchronization212US 7,454,632 B2Intel Corporation · 2008
- Method and apparatus for adaptive CPU power management205US 7,010,708 B2Broadcom Corporation · 2006
- System and method for task performance based dynamic distributed power management in a computer system and design method therefor197US 6,115,823 AAmphus, Inc. · 2000