Segment clock gating
AssigneeAdvanced Micro Devices, Inc.
InventorsBenjamin Tsien, Pravesh Gupta, Madhusudan Chilakam, Jeffrey Lynn Freeman, Indrani Paul, Guhan Krishnan, Ann M. Ling, Chandana Yerneni
Life of this patent
Estimating the term…
Abstract
The disclosed device includes various circuit blocks and a clock tree for sending a clock signal to the circuit blocks. The clock tree includes various clock drivers. The device also includes a control circuit that power gates, in response to one of the circuit blocks being power gated, a portion of the clock tree that includes one of the clock drivers. Various other methods, systems, and computer-readable media are also disclosed.
Claims20
A device comprising:
- a clock tree configured to send a clock signal to a plurality of circuit blocks;
- a clock driver for driving a portion of the clock tree, thereby providing the clock signal to one or more circuit blocks of the plurality of circuit blocks;
- and
- a control circuit configured to:
- power gate the one or more circuit blocks of the plurality of circuit blocks;
- and
- power off the clock driver.
A system comprising:
- a plurality of segments each comprising circuit blocks;
- a plurality of clock drivers each configured to drive a clock signal to a respective segment of the plurality of segments;
- and
- a control circuit configured to:
- power gate a segment of the plurality of segments;
- and
- power off a corresponding clock driver of the plurality of clock drivers associated with the power gated segment.
A method comprising:
- power gating, in response to a power gate event, one or more circuit blocks;
- powering off a clock driver that drives a segment of a clock tree providing a clock signal to the one or more circuit blocks;
- powering on, in response to a wakeup event, the clock driver;
- and
- exiting power gating in the one or more circuit blocks in response to powering on the clock driver.
Dependencies are inferred from the claim text.