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US 7,454,632 B2Granted
Reducing computing system power through idle synchronization
AssigneeIntel Corporation
InventorsJames P Kardach, David L Williams, Animesh Mishra
Life of this patent
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Abstract
Systems and methods of power management provide for controlling the idleness of a processor based on an operating system schedule. The idleness of at least one device is synchronized with the idleness of the processor. Idleness synchronization may involve deferring bus transactions, suspending memory refresh, turning off power to clock sources and turning off power to combinatorial logic during an idle window in the OS schedule.
Claims24
An apparatus comprising:
- power management logic to control an idleness of a processor based on an operating system (OS) schedule;
- and
- synchronization logic to synchronize an idleness of at least one device with the idleness of the processor, the synchronization logic including pre-timing logic to initiate an idleness exit procedure near an end of an idle window in the OS schedule to synchronize activity of the device to an active window in the OS schedule.
A method comprising:
- controlling an idleness of a processor based on an operating system (OS) schedule;
- synchronizing an idleness of at least one device with the idleness of the processor;
- and
- initiating an idleness exit procedure near an end of an idle window in the OS schedule to synchronize activity of the device to an active window in the OS schedule.
1 more element
A system comprising:
- a processor having a memory controller;
- power management logic to control an idleness of the processor based on an operating system (OS) schedule;
- and
- synchronization logic to synchronize an idleness of at least one device with the idleness of the processor, wherein the synchronization logic is to permit an activity of the device during an active window in the OS schedule and to prevent the activity during an idle window in the OS schedule, the active window to be associated with an active state of the processor and the inactive window to be associated with an idle state of the processor, the synchronization logic including pre-timing logic to initiate an idleness exit procedure near an end of the idle window in the OS schedule to synchronize the activity of the device with an active window in the OS schedule.
1 more element
A method comprising:
- detecting an event;
- placing a processor in an active state in response to the event;
- permitting an activity of each of a plurality of devices if the processor is in the active state;
- removing the processor from the active state if the processor is ready to enter an idle state;
- preventing the activity of each of the plurality of devices if the processor is in the idle state;
- initiating an idleness exit procedure near an end of an idle window in the OS schedule to synchronize the activity of the device with the active window in the OS schedule;
- and
- repeating the detecting, placing, permitting, removing and preventing on a periodic basis according to an operating system (OS) schedule.
5 more elements
Dependencies are inferred from the claim text.