Y10S 438/969
Simultaneous formation of monocrystalline and polycrystalline regions
Y10S438/969 (Simultaneous formation of monocrystalline and polycrystalline regions) appears on 92 US grants and 23 published applications in this corpus.
Search patents in Y10S- Granted patents
- 92
- Published applications
- 23
- Assignees
- 40
- Inventors
- 171
- Latest grant
- 7 Aug 2012
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 5 | 0 |
| 1977 | 3 | 0 |
| 1978 | 3 | 0 |
| 1979 | 1 | 0 |
| 1980 | 1 | 0 |
| 1981 | 2 | 0 |
| 1982 | 0 | 0 |
| 1983 | 2 | 0 |
| 1984 | 3 | 0 |
| 1985 | 4 | 0 |
| 1986 | 4 | 0 |
| 1987 | 2 | 0 |
| 1988 | 1 | 0 |
| 1989 | 2 | 0 |
| 1990 | 3 | 0 |
| 1991 | 1 | 0 |
| 1992 | 5 | 0 |
| 1993 | 2 | 0 |
| 1994 | 1 | 0 |
| 1995 | 3 | 0 |
| 1996 | 4 | 0 |
| 1997 | 5 | 0 |
| 1998 | 3 | 0 |
| 1999 | 2 | 0 |
| 2000 | 1 | 0 |
| 2001 | 2 | 0 |
| 2002 | 5 | 6 |
| 2003 | 2 | 3 |
| 2004 | 1 | 3 |
| 2005 | 4 | 2 |
| 2006 | 3 | 3 |
| 2007 | 3 | 2 |
| 2008 | 0 | 2 |
| 2009 | 5 | 1 |
| 2010 | 0 | 1 |
| 2011 | 3 | 0 |
| 2012 | 1 | 0 |
By publication year. Applications have been published since 2001.
Recent patents
- Polycrystalline semiconductor layers and methods for forming the same7 Aug 2012US 8,236,603 B1Rochester Institute of Technology
- Method of manufacturing silicon carbide self-aligned epitaxial MOSFET for high powered device applications9 Aug 2011US 7,994,017 B2Cree, Inc.
- Vertical PNP transistor and method of making same5 Jul 2011US 7,972,919 B2International Business Machines Corporation
- Method to improve writer leakage in SiGe bipolar device1 Mar 2011US 7,898,038 B2Agere Systems Inc.
- Silicon carbide self-aligned epitaxial MOSFET for high powered device applications8 Dec 2009US 7,629,616 B2Cree, Inc.
- Method of manufacturing silicon carbide self-aligned epitaxial mosfet for high powered device applications18 Feb 2010US 2010/0041195 A1Cree, Inc.
- Method to improve writer leakage in sige bipolar device24 Sep 2009US 2009/0236668 A1LSI Corporation
- Silicon carbide self-aligned epitaxial MOSFET and method of manufacturing thereof28 Aug 2008US 2008/0203398 A1Cree, Inc.
- Method to Improve Writer Leakage in a SiGe Bipolar Device14 Aug 2008US 2008/0191246 A1Agere Systems Inc.
- Selective epitaxy process with alternating gas supply6 Sep 2007US 2007/0207596 A1APPLIED Materials.Inc.
Most cited
By later US patents
- Method of fabricating a self-aligned metal-semiconductor FET having an insulator spacer272US 4,711,858 AInternational Business Machines Corporation · 1987
- Process for producing an epitaxial layer with laterally varying doping82US 6,171,935 B2Siemens Aktiengesellschaft · 2001
- Semiconductor device and method of manufacturing same66US 4,963,505 ANippondenso Co., Ltd. · 1990
- Heterojunction bipolar transistor with silicon-germanium base59US 5,506,427 ANEC Corporation · 1996
- Process of producing heterojunction bipolar transistor with silicon-germanium base57US 5,494,836 ANEC Corporation · 1996