Method of manufacturing silicon carbide self-aligned epitaxial MOSFET for high powered device applications

A method of manufacturing a MOSFET comprising:

• forming a trench in a first layer, the first layer having a first conductivity type and opposite first and second surfaces, the trench extending into the first layer from the first surface;
• epitaxially growing a second layer within the trench and on the first surface of the first layer, the second layer having a second conductivity type opposite the first conductivity type;
• epitaxially growing a third layer on the second layer within the trench and over the first surface of the first layer, the third layer having the first conductivity type;
• forming a first oxide layer on the third layer within the trench and over the first surface of the first layer;
• etching the first oxide layer substantially vertically so that the first oxide layer remains only over the trench as oxide spacers and so that the third layer is exposed between the oxide spacers, to provide a first structure;
• etching the first structure using the oxide spacers as a mask to expose the first surface, to remove the third layer and part of the second layer between the oxide spacers, and to expose a surface of the second layer within the trench that is not between the oxide spacers, to provide a second structure;
• forming a gate oxide layer on an entirety of the second structure;
• forming a gate electrode on the gate oxide layer over the surface of the second layer;
• etching the gate oxide layer between the oxide spacers;
• forming a source electrode between the oxide spacers in contact with the second and third layers;
• and
• forming a drain electrode over the second surface of the first layer.

A method of manufacturing a MOSFET comprising:

• forming a trench in a first layer;
• epitaxially growing a second layer within the trench and on the first layer outside the trench;
• epitaxially growing a third layer on the second layer;
• forming spacers on the third layer over the trench;
• etching the second and third layers using the spacers as a mask to remove the third layer and a part of the second layer between the spacers, and to expose the first layer outside the trench;
• etching the spacers after said etching the second and third layers, to further expose the third layer within the trench and so that portions of the spacers remain;
• and
• forming a source electrode on the second and third layers between the remaining portions of the spacers.