H03M 13/2782
Interleaver implementations, which reduce the amount of required interleaving memory
Official title: {Interleaver implementations, which reduce the amount of required interleaving memory}
H03M13/2782 (Interleaver implementations, which reduce the amount of required interleaving memory) appears on 160 US grants and 147 published applications in this corpus.
Search patents in H03M- Granted patents
- 160
- Published applications
- 147
- Assignees
- 87
- Inventors
- 173
- Latest grant
- 6 Jan 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1983 | 1 | 0 |
| 1984 | 0 | 0 |
| 1985 | 0 | 0 |
| 1986 | 0 | 0 |
| 1987 | 0 | 0 |
| 1988 | 0 | 0 |
| 1989 | 1 | 0 |
| 1990 | 0 | 0 |
| 1991 | 1 | 0 |
| 1992 | 0 | 0 |
| 1993 | 0 | 0 |
| 1994 | 0 | 0 |
| 1995 | 0 | 0 |
| 1996 | 3 | 0 |
| 1997 | 1 | 0 |
| 1998 | 5 | 0 |
| 1999 | 2 | 0 |
| 2000 | 1 | 0 |
| 2001 | 4 | 1 |
| 2002 | 2 | 4 |
| 2003 | 4 | 17 |
| 2004 | 8 | 8 |
| 2005 | 5 | 12 |
| 2006 | 15 | 6 |
| 2007 | 6 | 6 |
| 2008 | 5 | 4 |
| 2009 | 6 | 1 |
| 2010 | 6 | 3 |
| 2011 | 5 | 5 |
| 2012 | 1 | 3 |
| 2013 | 9 | 3 |
| 2014 | 4 | 2 |
| 2015 | 3 | 2 |
| 2016 | 1 | 5 |
| 2017 | 3 | 3 |
| 2018 | 6 | 3 |
| 2019 | 4 | 5 |
| 2020 | 5 | 17 |
| 2021 | 8 | 8 |
| 2022 | 13 | 12 |
| 2023 | 8 | 4 |
| 2024 | 6 | 3 |
| 2025 | 7 | 7 |
| 2026 | 1 | 3 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Interleave circuit and communication device6 Jan 2026US 12,517,826 B2Kabushiki Kaisha Toshiba
- Distributed error detection and correction with hamming code handoff28 Oct 2025US 12,455,784 B2Texas Instruments Incorporated
- Multi-processor bridge with cache allocate awareness30 Sep 2025US 12,430,201 B2Texas Instruments Incorporated
- Delayed snoop for improved multi-process false sharing parallel thread performance12 Aug 2025US 12,386,696 B2Texas Instruments Incorporated
- Multicore shared cache operation engine15 Jul 2025US 12,360,843 B2Texas Instruments Incorporated
- Apparatus and methods for channel allocation11 Jun 2026US 2026/0163589 A1Infinera Corporation
- Data stream de-interleaving method, device, and system30 Apr 2026US 2026/0121664 A1Huawei Technologies Co., Ltd.
- Interleaver and deinterleaver with delay memory for a transmitter or receiver23 Apr 2026US 2026/0113142 A1Northrop Grumman Systems Corporation
- Delayed snoop for multi-cache systems6 Nov 2025US 2025/0342081 A1
- Multicore shared cache operation engine23 Oct 2025US 2025/0328415 A1
Most cited
By later US patents
- Apparatus for interleaving and de-interleaving data104US 4,394,642 ASperry Corporation · 1983
- Method of error protected transmission, method of error protected reception of data and transmission system for transmission of data103US 5,799,033 AU. S. Philips Corporation · 1998
- Error disbursing format for digital information and method for organizing same94US 4,802,170 AMatrox Electronics Systems, Ltd. · 1989
- Efficient address generation for convolutional interleaving using a minimal amount of memory88US 5,764,649 AAmati Communications Corporation · 1998
- Interleaving and de-interleaving method for digital data, interleaving and de-interleaving devices, and communication system72US 6,151,690 AAlcatel · 2000