H03M 13/095
Error detection codes other than crc and single parity bit codes
Official title: {Error detection codes other than CRC and single parity bit codes}
H03M13/095 (Error detection codes other than crc and single parity bit codes) appears on 256 US grants and 242 published applications in this corpus.
Search patents in H03M- Granted patents
- 256
- Published applications
- 242
- Assignees
- 136
- Inventors
- 477
- Latest grant
- 30 Jun 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1992 | 1 | 0 |
| 1993 | 1 | 0 |
| 1994 | 0 | 0 |
| 1995 | 0 | 0 |
| 1996 | 0 | 0 |
| 1997 | 1 | 0 |
| 1998 | 4 | 0 |
| 1999 | 0 | 0 |
| 2000 | 0 | 0 |
| 2001 | 0 | 0 |
| 2002 | 0 | 4 |
| 2003 | 4 | 2 |
| 2004 | 4 | 5 |
| 2005 | 1 | 6 |
| 2006 | 7 | 7 |
| 2007 | 5 | 8 |
| 2008 | 11 | 4 |
| 2009 | 3 | 4 |
| 2010 | 7 | 14 |
| 2011 | 6 | 9 |
| 2012 | 12 | 7 |
| 2013 | 11 | 15 |
| 2014 | 20 | 12 |
| 2015 | 15 | 16 |
| 2016 | 11 | 15 |
| 2017 | 15 | 14 |
| 2018 | 12 | 15 |
| 2019 | 16 | 14 |
| 2020 | 9 | 10 |
| 2021 | 19 | 14 |
| 2022 | 15 | 19 |
| 2023 | 14 | 9 |
| 2024 | 17 | 12 |
| 2025 | 11 | 4 |
| 2026 | 4 | 3 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Cluster intralayer safety mechanism in an artificial neural network processor30 Jun 2026US 12,670,233 B2Hailo Technologies Ltd.
- Error correction30 Jun 2026US 12,671,443 B2Micron Technology, Inc.
- Error protection for managed memory devices24 Feb 2026US 12,561,201 B2Micron Technology, Inc.
- Systems and methods for dual list decoding of convolutional codes6 Jan 2026US 12,519,564 B2The Regents of the University of California
- Encoding and decoding techniques2 Dec 2025US 12,489,464 B2QUALCOMM Incorporated
- Error protection for managed memory devices3 Sep 2026US 2026/0259795 A1Micron Technology, Inc.
- Learning-based min-sum hard decoding for non-volatile memory devices4 Jun 2026US 2026/0155836 A1
- Fast BF Decoder with Column Zone Convergence Detection16 Apr 2026US 2026/0106631 A1SK hynix Inc.
- Systems and Methods for Dual List Decoding of Convolutional Codes2 Oct 2025US 2025/0310030 A1The Regents of the University of California
- Error detection and classification at a host device15 May 2025US 2025/0158639 A1Micron Technology, Inc.
Most cited
By later US patents
- Error detection and correction scheme for a memory device64US 7,389,465 B2Micron Technology, Inc. · 2008
- Method for generating a checksum62US 5,247,524 ADigital Equipment Corporation · 1993
- Method and apparatus for generating error correction data, and a computer-readable recording medium recording an error correction data generating program thereon51US 7,320,099 B2Fujitsu Limited · 2008
- Method, system and apparatus for providing access to error correction information50US 9,026,888 B2Intel Corporation · 2015
- System and method to insert a TCP checksum in a protocol neutral manner49US 6,728,929 B1Spirent Communications of Calabasas, Inc. · 2004