US 9,026,888 B2Granted

Method, system and apparatus for providing access to error correction information

AssigneeIntel Corporation

InventorZion S. Kwok

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Abstract

Techniques and mechanisms to facilitate data error detection by a memory controller. In an embodiment, the memory controller calculates, for each of a plurality of data blocks, a respective result based on a first metadata value and data of that data block, where the first metadata value describes a characteristic which is common to each of the plurality of data blocks. With each such calculated result, the memory controller further performs a respective error detection analysis, wherein such analysis is based on a retrieved error correction code for a corresponding one of the plurality of data blocks. In another embodiment, a single version of the metadata value is stored by the memory controller, where the single version of the metadata value is made available to facilitate error detection for any of the plurality of data blocks.

Claims18

Dependent claims

A memory controller comprising:

memory access logic to service one or more write requests, including the memory access logic to:
store to one or more memory devices a first data block, a second data block, a first error correction code corresponding to the first data block, and a second error correction code corresponding to the second data block;
identify a first metadata value as corresponding to both the first data block and the second data block, wherein the first metadata value describes a characteristic that, prior to the one or more write requests, is common to the first data block and the second data block;
and
store reference information in response to identification of the first metadata value, wherein the reference information associates the first data block and the second data block each with a first location storing the first metadata value;
wherein the memory controller comprises encoder logic, responsive to the one or more write requests, to:
calculate a first result based on the first data block and the first metadata value;
calculate a second result based on the second data block and the first metadata value;
calculate the first error correction code based on the first result;
and
calculate the second error correction code based on the second result;
the memory access logic further to service one or more read requests, including the memory access logic to retrieve from the one or more memory devices first data of the first data block, second data of the second data block, the first error correction code and the second error correction code;
and
wherein, responsive to the one or more read requests, the error detection logic further to generate a third result based on the retrieved first data and the first metadata value stored at the first location to perform a first error detection analysis with the third result, wherein the first error detection analysis is based on the retrieved first error correction code, to generate a first signal which indicates whether an error is indicated by the first error detection analysis, to generate a fourth result based on the retrieved second data and the first metadata value stored at the first location, to perform a second error detection analysis with the fourth result, wherein the second error detection analysis is based on the retrieved second error correction code, and to generate a second signal which indicates whether an error is indicated by the second error detection analysis.

11 more elements

A method at a memory controller, the method comprising:

servicing one or more write requests, including:
identifying a first metadata value as corresponding to both a first data block and a second data block, wherein the first metadata value describes a characteristic that, prior to the one or more write requests, is common to the first data block and the second data block;
storing reference information in response to identification of the first metadata value, wherein the reference information associates the first data block and the second data block each with a first location storing the first metadata value;
calculating a first result based on the first data block and the first metadata value;
calculating a second result based on the second data block and the first metadata value;
calculating a first error correction code based on the first result;
calculating a second error correction code based on the second result;
storing to one or more memory devices the first data block, the second data block, the first error correction code, and the second error correction code;
in response to one or more read requests, retrieving from one or more memory devices first data of the first data block, second data of the second data block, the first error correction code, and the second error correction code;
generating a third result based on the retrieved first data and the first metadata value stored at the first location;
performing a first error detection analysis with the third result, wherein the first error detection analysis is based on the retrieved first error correction code;
generating a first signal which indicates whether an error is indicated by the first error detection analysis;
generating a fourth result based on the retrieved second data and the first metadata value stored at the first location;
performing a second error detection analysis with the fourth result, wherein the second error detection analysis is based on the retrieved second error correction code;
and
generating a second signal which indicates whether an error is indicated by the second error detection analysis.

13 more elements

A system comprising:

one or more memory devices;
a memory controller to control the one or more memory devices, the memory controller including:
memory access logic to service one or more write requests, including the memory access logic to:
store to the one or more memory devices a first data block, a second data block, a first error correction code corresponding to the first data block, and a second error correction code corresponding to the second data block;
identify a first metadata value as corresponding to both the first data block and the second data block, wherein the first metadata value describes a characteristic that, prior to the one or more write requests, is common to the first data block and the second data block;
and
store reference information in response to identification of the first metadata value, wherein the reference information associates the first data block and the second data block each with a first location storing the first metadata value;
wherein the memory controller comprises encoder logic, responsive to the one or more write requests, to:
calculate a first result based on the first data block and the first metadata value;
calculate a second result based on the second data block and the first metadata value;
calculate the first error correction code based on the first result;
and
calculate the second error correction code based on the second result;
the memory access logic further to service one or more read requests, including the memory access logic to retrieve from the one or more memory devices first data of the first data block, second data of the second data block, the first error correction code and the second error correction code;
and
wherein, responsive to the one or more read requests, the error detection logic further to generate a third result based on the retrieved first data and the first metadata value stored at the first location to perform a first error detection analysis with the third result, wherein the first error detection analysis is based on the retrieved first error correction code, to generate a first signal which indicates whether an error is indicated by the first error detection analysis, to generate a fourth result based on the retrieved second data and the first metadata value stored at the first location, to perform a second error detection analysis with the fourth result, wherein the second error detection analysis is based on the retrieved second error correction code, and to generate a second signal which indicates whether an error is indicated by the second error detection analysis;
and
a touchscreen display device configured to provide a user display based on data accessed by the memory controller.

15 more elements

A non-transitory computer-readable storage medium having stored thereon instructions which, when executed by one or more processing units, cause the one or more processing units to perform a method comprising:

servicing one or more write requests, including:
identifying a first metadata value as corresponding to both a first data block and a second data block, wherein the first metadata value describes a characteristic that, prior to the one or more write requests, is common to the first data block and the second data block;
storing reference information in response to identification of the first metadata value, wherein the reference information associates the first data block and the second data block each with a first location storing the first metadata value;
calculating a first result based on the first data block and the first metadata value;
calculating a second result based on the second data block and the first metadata value;
calculating a first error correction code based on the first result;
calculating a second error correction code based on the second result;
storing to one or more memory devices the first data block, the second data block, the first error correction code, and the second error correction code;
in response to one or more read requests, retrieving from one or more memory devices first data of the first data block, second data of the second data block, the first error correction code, and the second error correction code;
generating a third result based on the retrieved first data and the first metadata value stored at the first location;
performing a first error detection analysis with the third result, wherein the first error detection analysis is based on the retrieved first error correction code;
generating a first signal which indicates whether an error is indicated by the first error detection analysis;
generating a fourth result based on the retrieved second data and the first metadata value stored at the first location;
performing a second error detection analysis with the fourth result, wherein the second error detection analysis is based on the retrieved second error correction code;
and
generating a second signal which indicates whether an error is indicated by the second error detection analysis.

13 more elements

Dependencies are inferred from the claim text.

Facts

Application: 13/725,809Filed 21 Dec 2012
Published: US 2014/0181615 A126 Jun 2014
Granted: 5 May 2015
Term ends: Not estimatedThe source records don’t support an estimate.

Classification10 codes

H03M 13/2906
Combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes: using…
G06F 11/00
Error detection
G06F 11/1012
In individual solid state devices: using codes or arrangements adapted for a specific type of error
H03M 13/095
Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit: error detection codes other than CRC and single parity…