H03K 5/15066
Using bistable devices
Official title: {using bistable devices (H03K5/15093 takes precedence)}
H03K5/15066 (Using bistable devices) appears on 98 US grants and 62 published applications in this corpus.
Search patents in H03K- Granted patents
- 98
- Published applications
- 62
- Assignees
- 70
- Inventors
- 187
- Latest grant
- 25 Nov 2025
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1979 | 1 | 0 |
| 1980 | 0 | 0 |
| 1981 | 1 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 1 | 0 |
| 1985 | 2 | 0 |
| 1986 | 2 | 0 |
| 1987 | 0 | 0 |
| 1988 | 0 | 0 |
| 1989 | 3 | 0 |
| 1990 | 2 | 0 |
| 1991 | 2 | 0 |
| 1992 | 2 | 0 |
| 1993 | 6 | 0 |
| 1994 | 1 | 0 |
| 1995 | 3 | 0 |
| 1996 | 1 | 0 |
| 1997 | 2 | 0 |
| 1998 | 2 | 0 |
| 1999 | 1 | 0 |
| 2000 | 1 | 0 |
| 2001 | 1 | 0 |
| 2002 | 1 | 0 |
| 2003 | 1 | 0 |
| 2004 | 0 | 3 |
| 2005 | 1 | 1 |
| 2006 | 2 | 3 |
| 2007 | 5 | 0 |
| 2008 | 2 | 1 |
| 2009 | 2 | 3 |
| 2010 | 1 | 3 |
| 2011 | 2 | 0 |
| 2012 | 1 | 1 |
| 2013 | 2 | 0 |
| 2014 | 1 | 2 |
| 2015 | 1 | 3 |
| 2016 | 2 | 4 |
| 2017 | 4 | 10 |
| 2018 | 8 | 6 |
| 2019 | 9 | 4 |
| 2020 | 5 | 2 |
| 2021 | 3 | 3 |
| 2022 | 1 | 2 |
| 2023 | 3 | 6 |
| 2024 | 4 | 1 |
| 2025 | 3 | 4 |
By publication year. Applications have been published since 2001.
Recent patents
- Apparatus and method for monitoring duty cycle of memory clock signal25 Nov 2025US 12,483,230 B2Electronics and Telecommunications Research Institute
- Hybrid clocking scheme for SERDES physical layer circuits12 Aug 2025US 12,388,692 B2QUALCOMM Incorporated
- Semiconductor device, display module, and electronic device7 Jan 2025US 12,190,842 B2Semiconductor Energy Laboratory Co.Ltd.
- Multi-phase signal generation22 Oct 2024US 12,124,289 B2Huawei Technologies Co., Ltd.
- Timing sequence generation circuit28 May 2024US 11,996,849 B2STMicroelectronics (Alps) SAS
- Hybrid clocking scheme for serdes physical layer circuits15 May 2025US 2025/0158858 A1QUALCOMM Incorporated
- Dynamic latch, dynamic d flip-flop, data operation unit, chip, hash board, and computing device8 May 2025US 2025/0150068 A1Canaan Creative (SH) Co., LTD.
- Semiconductor device, display module, and electronic device27 Feb 2025US 2025/0069564 A1Semiconductor Energy Laboratory Co.Ltd.
- Multi-phase signal generation2 Jan 2025US 2025/0004496 A1Huawei Technologies Co., Ltd.
- Apparatus and method for monitoring duty cycle of memory clock signal13 Jun 2024US 2024/0195400 A1Electronics and Telecommunications Research Institute
Most cited
By later US patents
- Multi-phase clock generator circuit69US 5,867,046 ANEC Corporation · 1999
- Sequence control apparatus for producing output signals in synchronous with a consistent delay from rising or falling edge of clock input signal58US 5,261,081 ANCR Corporation · 1993
- Integrated circuit data latch driver circuit53US 6,111,446 AMicron Technology, Inc. · 2000
- Digital signal delay circuit45US 4,626,716 ASony/Tektronix Corporation · 1986
- Phase-selectable flip-flop39US 5,004,933 ATektronix, Inc. · 1991