H03K 2005/00019
Variable delay
Official title: {Variable delay}
H03K2005/00019 (Variable delay) appears on 1,838 US grants and 1,565 published applications in this corpus.
Search patents in H03K- Granted patents
- 1,838
- Published applications
- 1,565
- Assignees
- 503
- Inventors
- 2,998
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1984 | 1 | 0 |
| 1985 | 0 | 0 |
| 1986 | 1 | 0 |
| 1987 | 5 | 0 |
| 1988 | 2 | 0 |
| 1989 | 6 | 0 |
| 1990 | 3 | 0 |
| 1991 | 6 | 0 |
| 1992 | 12 | 0 |
| 1993 | 5 | 0 |
| 1994 | 6 | 0 |
| 1995 | 2 | 0 |
| 1996 | 2 | 0 |
| 1997 | 6 | 0 |
| 1998 | 5 | 0 |
| 1999 | 24 | 0 |
| 2000 | 46 | 0 |
| 2001 | 43 | 23 |
| 2002 | 57 | 45 |
| 2003 | 53 | 59 |
| 2004 | 46 | 71 |
| 2005 | 62 | 73 |
| 2006 | 82 | 84 |
| 2007 | 74 | 64 |
| 2008 | 72 | 96 |
| 2009 | 72 | 88 |
| 2010 | 80 | 68 |
| 2011 | 87 | 58 |
| 2012 | 63 | 30 |
| 2013 | 42 | 43 |
| 2014 | 45 | 41 |
| 2015 | 34 | 37 |
| 2016 | 73 | 74 |
| 2017 | 100 | 78 |
| 2018 | 74 | 84 |
| 2019 | 104 | 69 |
| 2020 | 89 | 68 |
| 2021 | 71 | 61 |
| 2022 | 71 | 55 |
| 2023 | 62 | 45 |
| 2024 | 46 | 59 |
| 2025 | 51 | 57 |
| 2026 | 53 | 35 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Transmitter interpolating clock signal, communication device including the same, and method of operating the same6 Oct 2026US 12,756,382 B2Samsung Electronics Co., Ltd.
- Delay line calibration method22 Sep 2026US 12,743,056 B2Magics Technologies
- Adjustable power FET driver22 Sep 2026US 12,744,526 B2Texas Instruments Incorporated
- Phase interpolation circuit8 Sep 2026US 12,732,173 B2Thine Electronics, Inc.
- Hybrid phase interpolator with unified blender and eye-surf circuit8 Sep 2026US 12,732,174 B1Cadence Design Systems, Inc.
- Communication circuits including a differential to quadrature phase generator8 Oct 2026US 2026/0312785 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Gate driver circuit1 Oct 2026US 2026/0302922 A1Renesas Design (UK) Limited
- Positive/negative skew calibration in active electrical cables1 Oct 2026US 2026/0303076 A1Marvell Asia Pte Ltd
- Data acquisition system24 Sep 2026US 2026/0291473 A1Cirrus Logic International Semiconductor Ltd.
- Chip data transfer interface and semiconductor device24 Sep 2026US 2026/0291474 A1Global Unichip Corporation
Most cited
By later US patents
- Scannable sense amplifier circuit421US 5,915,084 AAdvanced Micro Devices, Inc. · 1999
- Delay-locked loop circuitry for clock delay adjustment248US 6,125,157 ARambus Inc. · 2000
- Method and apparatus for receiving high speed signals with low latency243US 6,396,329 B1Rambus Inc. · 2002
- Delay locked loop circuitry for clock delay adjustment169US 6,539,072 B1Rambus Inc. · 2003
- Delay circuitry, clock generating circuitry, and phase synchronization circuitry130US 6,259,293 B1Mitsubishi Denki Kabushiki Kaisha · 2001