Adjustable power FET driver
AssigneeTexas Instruments Incorporated
InventorsRaveesh Magod Ramakrishna, Maik Peter Kaufmann, Michael Lueders, Johan Strydom, Stefan Herzer
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AssigneeTexas Instruments Incorporated
InventorsRaveesh Magod Ramakrishna, Maik Peter Kaufmann, Michael Lueders, Johan Strydom, Stefan Herzer
Estimating the term…
In described examples, an integrated circuit includes first and second current sources, first and second switches, a dV/dt phase detector, a control circuit, and source, gate, and drain terminals for coupling to, respectively, a source, gate, and drain of a power FET. The first switch is coupled between the first current source and the gate terminal. The second switch is coupled between the second current source and the gate terminal. The dV/dt phase detector detects a dV/dt phase of the power FET and outputs to the control circuit. The control circuit controls the first and second switches to perform a turn-on sequence of the power FET, including: closing the first switch while keeping the second switch open; and after receiving a signal from the dV/dt phase detector indicating the dV/dt phase has started, opening the first switch, and closing the second switch.
An integrated circuit comprising:
A method comprising:
An integrated circuit comprising:
Dependencies are inferred from the claim text.