G11C 2207/007
Register arrays
G11C2207/007 (Register arrays) appears on 55 US grants and 48 published applications in this corpus.
Search patents in G11C- Granted patents
- 55
- Published applications
- 48
- Assignees
- 30
- Inventors
- 120
- Latest grant
- 3 Mar 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 2002 | 0 | 1 |
| 2003 | 3 | 2 |
| 2004 | 0 | 1 |
| 2005 | 2 | 3 |
| 2006 | 2 | 1 |
| 2007 | 2 | 1 |
| 2008 | 1 | 0 |
| 2009 | 0 | 0 |
| 2010 | 0 | 2 |
| 2011 | 1 | 1 |
| 2012 | 0 | 1 |
| 2013 | 1 | 1 |
| 2014 | 5 | 5 |
| 2015 | 2 | 3 |
| 2016 | 3 | 1 |
| 2017 | 3 | 0 |
| 2018 | 3 | 3 |
| 2019 | 3 | 4 |
| 2020 | 3 | 2 |
| 2021 | 5 | 2 |
| 2022 | 5 | 5 |
| 2023 | 5 | 3 |
| 2024 | 3 | 4 |
| 2025 | 2 | 0 |
| 2026 | 1 | 2 |
By publication year. 2026 runs to 8 Oct.
Recent patents
- Multiple test modes for a memory in an integrated circuit3 Mar 2026US 12,567,476 B2SambaNova Systems, Inc.
- Multi-buffered register files with shared access circuits12 Aug 2025US 12,386,618 B2Intel Corporation
- Method of operating a storage device4 Mar 2025US 12,244,309 B2STMicroelectronics (Grenoble 2) SAS
- Flip flop standard cell13 Aug 2024US 12,063,041 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Single “A” latch with an array of “B” latches16 Apr 2024US 11,961,575 B2SambaNova Systems, Inc.
- Managing Common Access Request in a Distributed Storage System3 Sep 2026US 2026/0259788 A1Pure Storage, Inc.
- Scan-path integrated circuit memory with output bus feedback9 Jul 2026US 2026/0196286 A1SambaNova Systems, Inc.
- Single "a" latch with an array of "b" latches25 Jul 2024US 2024/0249791 A1SambaNova Systems, Inc.
- Method of operating a storage device11 Jul 2024US 2024/0235555 A9STMicroelectronics (Grenoble 2) SAS
- Method of operating a storage device25 Apr 2024US 2024/0137025 A1STMicroelectronics (Grenoble 2) SAS
Most cited
By later US patents
- System and method for cryogenic hybrid technology computing and memory58US 9,520,180 B1Hypres, Inc. · 2016
- Register file circuit and method for improving the minimum operating supply voltage13US 9,251,875 B1QUALCOMM Incorporated · 2016
- System and method for cryogenic hybrid technology computing and memory11US 9,887,000 B1Hypres, Inc. · 2018
- Low leakage and leakage tolerant stack free multi-ported register file7US 7,209,395 B2Intel Corporation · 2007
- Method and circuit for row scannable latch array6US 11,443,822 B2SambaNova Systems, Inc. · 2022