G11C 11/402
With charge regeneration individual to each memory cell, i.e. internal refresh
Official title: with charge regeneration individual to each memory cell, i.e. internal refresh
G11C11/402 (With charge regeneration individual to each memory cell, i.e. internal refresh) appears on 301 US grants and 257 published applications in this corpus.
Search patents in G11C- Granted patents
- 301
- Published applications
- 257
- Assignees
- 74
- Inventors
- 399
- Latest grant
- 19 May 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 9 | 0 |
| 1977 | 6 | 0 |
| 1978 | 4 | 0 |
| 1979 | 3 | 0 |
| 1980 | 3 | 0 |
| 1981 | 7 | 0 |
| 1982 | 5 | 0 |
| 1983 | 1 | 0 |
| 1984 | 1 | 0 |
| 1985 | 2 | 0 |
| 1986 | 1 | 0 |
| 1987 | 1 | 0 |
| 1988 | 0 | 0 |
| 1989 | 0 | 0 |
| 1990 | 0 | 0 |
| 1991 | 1 | 0 |
| 1992 | 0 | 0 |
| 1993 | 0 | 0 |
| 1994 | 1 | 0 |
| 1995 | 0 | 0 |
| 1996 | 1 | 0 |
| 1997 | 2 | 0 |
| 1998 | 0 | 0 |
| 1999 | 0 | 0 |
| 2000 | 0 | 0 |
| 2001 | 0 | 0 |
| 2002 | 1 | 1 |
| 2003 | 1 | 0 |
| 2004 | 0 | 1 |
| 2005 | 1 | 0 |
| 2006 | 0 | 3 |
| 2007 | 0 | 0 |
| 2008 | 1 | 4 |
| 2009 | 1 | 5 |
| 2010 | 4 | 5 |
| 2011 | 2 | 7 |
| 2012 | 11 | 10 |
| 2013 | 8 | 14 |
| 2014 | 14 | 15 |
| 2015 | 20 | 9 |
| 2016 | 12 | 8 |
| 2017 | 14 | 10 |
| 2018 | 9 | 12 |
| 2019 | 11 | 18 |
| 2020 | 22 | 21 |
| 2021 | 16 | 24 |
| 2022 | 25 | 36 |
| 2023 | 32 | 23 |
| 2024 | 31 | 15 |
| 2025 | 10 | 9 |
| 2026 | 7 | 7 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Memory device including arrangement of independently and concurrently operable tiles of memory transistors19 May 2026US 12,635,577 B2Sunrise Memory Corporation
- Vertical digit lines for semiconductor devices14 Apr 2026US 12,604,464 B2Micron Technology, Inc.
- Vertical digit lines for semiconductor devices10 Mar 2026US 12,575,085 B2Micron Technology, Inc.
- Method for processing input variables by means of a processing device comprising at least two field-effect transistors, device for executing the method, computing device, and use17 Feb 2026US 12,556,196 B2Robert Bosch GmbH
- Memory cell using data storing bipolar device13 Jan 2026US 12,525,291 B2Zeno Semiconductor, Inc.
- Memory module with independently accessible memory channels formed across multiple memory dies13 Aug 2026US 2026/0240046 A1Sunrise Memory Corporation
- Distributed computing in a package with dram dies and a logic die30 Jul 2026US 2026/0219786 A1Samsung Electronics Co., Ltd.
- Semiconductor memory device30 Jul 2026US 2026/0221182 A1SK hynix Inc.
- Vertical digit lines for semiconductor devices9 Jul 2026US 2026/0197991 A1Micron Technology, Inc.
- Outer product engine with capacitive device array28 May 2026US 2026/0148787 A1International Business Machines Corporation
Most cited
By later US patents
- Memory cells, memory cell arrays, methods of using and methods of making215US 8,194,451 B2Zeno Semiconductor, Inc. · 2012
- Semiconductor memory having both volatile and non-volatile functionality including resistance change material and method of operating193US 8,243,499 B2Zeno Semiconductor, Inc. · 2012
- Memory cells, memory cell arrays, methods of using and methods of making169US 8,654,583 B2Zeno Semiconductor, Inc. · 2014
- Memory cells, memory cell arrays, methods of using and methods of making154US 8,531,881 B2Zeno Semiconductor, Inc. · 2013
- Memory cells, memory cell arrays, methods of using and methods of making154US 8,995,186 B2Zeno Semiconductors, Inc. · 2015