Semiconductor memory device
AssigneeSK hynix Inc.
InventorsJae Gil LEE, Won Tae KOO
Life of this patent
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Abstract
A semiconductor memory device may include a write transistor, a read transistor, and a one-way switch. The write transistor may be configured to output a signal of a write bit line as data in response to a signal of a write word line. The read transistor may be configured to store the data and to output the stored data to a read bit line in response to a signal of a read word line. The one-way switch may be configured to transmit the data in one direction from the write transistor to the read transistor.
Claims20
A semiconductor memory device comprising:
- a write transistor configured to output a signal of a write bit line as data in response to a signal of a write word line;
- a read transistor configured to store the data and to output the stored data to a read bit line in response to a signal of a read word line;
- and
- a one-way switch configured to transmit the data in one direction from the write transistor to the read transistor.
A semiconductor memory device comprising:
- a write bit line;
- a write transistor electrically connected to the write bit line and stacked over the write bit line;
- a one-way switch stacked over the write transistor;
- and
- a read transistor stacked over the unidirectional switch.
A semiconductor memory device comprising:
- a write transistor including a first source in connection with a write bit line, a vertical channel layer formed on the first source, and a first drain formed on the vertical channel, a first gate insulation layer configured to surround outer circumferential surfaces of the first source, the vertical channel layer and the first drain, and a first gate configured to surround an outer circumferential surface of the first gate insulation layer;
- a forward diode stacked over the first drain of the write transistor;
- and
- a read transistor including a second gate stacked over the forward diode, a second gate insulation layer formed on the second gate, a horizontal channel layer positioned on the second gate insulation layer, a second source positioned on one side of the horizontal channel layer, and a second drain positioned on the other side of the horizontal channel layer.
A semiconductor memory device comprising:
- a write bit line;
- a write transistor electrically connected to the write bit line;
- a read transistor electrically connected to a read word line and a read bit line;
- and
- a one-way switch operatively connected between a first drain of the write transistor and a gate of the read transistor,
- wherein the write transistor comprises a first channel, a first source electrically coupled to the write bit line, and the first drain.
Dependencies are inferred from the claim text.