Memory cells, memory cell arrays, methods of using and methods of making
AssigneeZeno Semiconductor, Inc.
InventorYuniarto Widjaja
Life of this patent
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AssigneeZeno Semiconductor, Inc.
InventorYuniarto Widjaja
Estimating the term…
A semiconductor memory cell and arrays of memory cells are provided In at least one embodiment, a memory cell includes a substrate having a top surface, the substrate having a first conductivity type selected from a p-type conductivity type and an n-type conductivity type; a first region having a second conductivity type selected from the p-type and n-type conductivity types, the second conductivity type being different from the first conductivity type, the first region being formed in the substrate and exposed at the top surface; a second region having the second conductivity type, the second region being formed in the substrate, spaced apart from the first region and exposed at the top surface; a buried layer in the substrate below the first and second regions, spaced apart from the first and second regions and having the second conductivity type; a body region formed between the first and second regions and the buried layer, the body region having the first conductivity type; a gate positioned between the first and second regions and above the top surface; and a nonvolatile memory configured to store data upon transfer from the body region.
A semiconductor memory cell comprising:
A semiconductor memory cell comprising:
A method of operating a memory cell having a floating body for storing, reading and writing data as volatile memory, and a nonvolatile memory for storing data, the method comprising:
A method of operating a semiconductor storage device comprising a plurality of memory cells each having a floating body for storing, reading and writing data as volatile memory, and a resistance change element for storing data as non-volatile memory, the method comprising:
Dependencies are inferred from the claim text.