G06F 9/30174
For non-native instruction set
Official title: {for non-native instruction set, e.g. Javabyte, legacy code}
G06F9/30174 (For non-native instruction set) appears on 582 US grants and 546 published applications in this corpus.
Search patents in G06F- Granted patents
- 582
- Published applications
- 546
- Assignees
- 145
- Inventors
- 899
- Latest grant
- 22 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1977 | 1 | 0 |
| 1978 | 0 | 0 |
| 1979 | 0 | 0 |
| 1980 | 0 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 1 | 0 |
| 1984 | 2 | 0 |
| 1985 | 1 | 0 |
| 1986 | 1 | 0 |
| 1987 | 0 | 0 |
| 1988 | 2 | 0 |
| 1989 | 3 | 0 |
| 1990 | 0 | 0 |
| 1991 | 1 | 0 |
| 1992 | 2 | 0 |
| 1993 | 3 | 0 |
| 1994 | 0 | 0 |
| 1995 | 3 | 0 |
| 1996 | 8 | 0 |
| 1997 | 13 | 0 |
| 1998 | 26 | 0 |
| 1999 | 25 | 0 |
| 2000 | 28 | 0 |
| 2001 | 13 | 4 |
| 2002 | 14 | 26 |
| 2003 | 18 | 22 |
| 2004 | 18 | 39 |
| 2005 | 14 | 22 |
| 2006 | 22 | 49 |
| 2007 | 17 | 16 |
| 2008 | 25 | 23 |
| 2009 | 27 | 21 |
| 2010 | 30 | 15 |
| 2011 | 27 | 10 |
| 2012 | 17 | 28 |
| 2013 | 15 | 21 |
| 2014 | 13 | 19 |
| 2015 | 23 | 14 |
| 2016 | 20 | 15 |
| 2017 | 25 | 19 |
| 2018 | 19 | 18 |
| 2019 | 22 | 20 |
| 2020 | 15 | 4 |
| 2021 | 12 | 9 |
| 2022 | 21 | 19 |
| 2023 | 11 | 7 |
| 2024 | 12 | 7 |
| 2025 | 5 | 4 |
| 2026 | 7 | 95 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Distributed control plane for reformatting communication between a container orchestration platform and a distributed storage architecture22 Sep 2026US 12,743,319 B2NetApp, Inc.
- Apparatus and method for managing deprecated instruction set architecture (ISA) features25 Aug 2026US 12,717,603 B2Intel Corporation
- Method and processor for executing target instructions28 Jul 2026US 12,693,865 B2Shanghai Zhaoxin Semiconductor Co., Ltd.
- Instruction conversion device, instruction conversion method, instruction conversion system, and processor for converting extended instructions based on an emulation flag7 Jul 2026US 12,675,292 B2Shanghai Zhaoxin Semiconductor Co., Ltd.
- Schedulable asynchronous methods with semi-reactive completion stages30 Jun 2026US 12,669,997 B2International Business Machines Corporation
- Instruction conversion method and processor17 Sep 2026US 2026/0277611 A1Shanghai Zhaoxin Semiconductor Co., Ltd.
- Simultaneous Silicon Spring and Chip Singulation DRIE13 Aug 2026US 2026/0239987 A1
- High Current Column Grid Array Pillars13 Aug 2026US 2026/0240010 A1
- Targeted Jet-Cooling System for Zetta-Scale Computing Assemblies16 Jul 2026US 2026/0202891 A1
- Local-Bias Adaptive Drive for Timing Stabilization in Pipelined Mixed-Precision Processing Elements16 Jul 2026US 2026/0203017 A1
Most cited
By later US patents
- High performance superscalar microprocessor including a common reorder buffer and common register file for both integer and floating point operations320US 5,651,125 AAdvanced Micro Devices, Inc. · 1997
- RISC architecture computer configured for emulation of the instruction set of a target computer288US 5,574,927 AInternational Meta Systems, Inc. · 1996
- Dual-architecture super-scalar pipeline285US 5,598,546 AExponential Technology, Inc. · 1997
- System and method for dynamically reconfigurable computing using a processing unit having changeable internal hardware organization227US 5,794,062 ARicoh Company, Ltd. · 1998
- Computer for execution of RISC and CISC instruction sets222US 7,047,394 B1ATI International SRL · 2006