G06F 9/3017
Runtime instruction translation
Official title: {Runtime instruction translation, e.g. macros}
G06F9/3017 (Runtime instruction translation) appears on 1,832 US grants and 1,560 published applications in this corpus.
Search patents in G06F- Granted patents
- 1,832
- Published applications
- 1,560
- Assignees
- 381
- Inventors
- 2,883
- Latest grant
- 22 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 1 | 0 |
| 1977 | 1 | 0 |
| 1978 | 1 | 0 |
| 1979 | 0 | 0 |
| 1980 | 0 | 0 |
| 1981 | 3 | 0 |
| 1982 | 2 | 0 |
| 1983 | 3 | 0 |
| 1984 | 8 | 0 |
| 1985 | 8 | 0 |
| 1986 | 4 | 0 |
| 1987 | 6 | 0 |
| 1988 | 5 | 0 |
| 1989 | 4 | 0 |
| 1990 | 2 | 0 |
| 1991 | 7 | 0 |
| 1992 | 8 | 0 |
| 1993 | 11 | 0 |
| 1994 | 9 | 0 |
| 1995 | 17 | 0 |
| 1996 | 20 | 0 |
| 1997 | 34 | 0 |
| 1998 | 75 | 0 |
| 1999 | 69 | 0 |
| 2000 | 76 | 0 |
| 2001 | 53 | 17 |
| 2002 | 52 | 61 |
| 2003 | 47 | 56 |
| 2004 | 51 | 98 |
| 2005 | 52 | 62 |
| 2006 | 63 | 82 |
| 2007 | 50 | 59 |
| 2008 | 61 | 67 |
| 2009 | 60 | 57 |
| 2010 | 71 | 34 |
| 2011 | 61 | 58 |
| 2012 | 40 | 58 |
| 2013 | 42 | 61 |
| 2014 | 47 | 70 |
| 2015 | 55 | 66 |
| 2016 | 73 | 80 |
| 2017 | 83 | 70 |
| 2018 | 67 | 64 |
| 2019 | 82 | 73 |
| 2020 | 68 | 50 |
| 2021 | 57 | 48 |
| 2022 | 62 | 65 |
| 2023 | 63 | 41 |
| 2024 | 45 | 35 |
| 2025 | 33 | 21 |
| 2026 | 20 | 107 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Distributed control plane for reformatting communication between a container orchestration platform and a distributed storage architecture22 Sep 2026US 12,743,319 B2NetApp, Inc.
- Recursive generation and distribution of command bundles at core array22 Sep 2026US 12,743,396 B1OXMIQ Labs Inc.
- Apparatus and method for managing deprecated instruction set architecture (ISA) features25 Aug 2026US 12,717,603 B2Intel Corporation
- Method and processor for executing target instructions28 Jul 2026US 12,693,865 B2Shanghai Zhaoxin Semiconductor Co., Ltd.
- Implementation and interpretation of API routing domain-specific language21 Jul 2026US 12,688,039 B2Kong Inc.
- Encoding and Decoding Variable Length Instructions8 Oct 2026US 2026/0310465 A1Imagination Technologies Limited
- Device, method and system for executing a tile load and expand instruction17 Sep 2026US 2026/0277610 A1Intel Corporation
- Instruction conversion method and processor17 Sep 2026US 2026/0277611 A1Shanghai Zhaoxin Semiconductor Co., Ltd.
- Tracking near-identical memory addresses and reducing memory access requests17 Sep 2026US 2026/0277852 A1Mobileye Vision Technologies Ltd.
- Simultaneous Silicon Spring and Chip Singulation DRIE13 Aug 2026US 2026/0239987 A1
Most cited
By later US patents
- Method and apparatus for patching problematic instructions in a microprocessor using software interrupts422US 6,631,463 B1International Business Machines Corporation · 2003
- Processor having plurality of functional units for orderly retiring outstanding operations based upon its associated tags403US 5,226,126 ANexgen Microsystems · 1993
- Dynamic multi-mode parallel processing array390US 5,475,856 AInternational Business Machines Corporation · 1995
- APAP I/O programmable router343US 5,963,745 AInternational Business Machines Corporation · 1999
- High performance superscalar microprocessor including a common reorder buffer and common register file for both integer and floating point operations320US 5,651,125 AAdvanced Micro Devices, Inc. · 1997