G06F 9/30149
Of variable length instructions
Official title: {of variable length instructions}
G06F9/30149 (Of variable length instructions) appears on 918 US grants and 621 published applications in this corpus.
Search patents in G06F- Granted patents
- 918
- Published applications
- 621
- Assignees
- 191
- Inventors
- 1,215
- Latest grant
- 22 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1978 | 1 | 0 |
| 1979 | 1 | 0 |
| 1980 | 1 | 0 |
| 1981 | 0 | 0 |
| 1982 | 1 | 0 |
| 1983 | 1 | 0 |
| 1984 | 2 | 0 |
| 1985 | 3 | 0 |
| 1986 | 1 | 0 |
| 1987 | 2 | 0 |
| 1988 | 3 | 0 |
| 1989 | 4 | 0 |
| 1990 | 2 | 0 |
| 1991 | 3 | 0 |
| 1992 | 12 | 0 |
| 1993 | 13 | 0 |
| 1994 | 13 | 0 |
| 1995 | 16 | 0 |
| 1996 | 25 | 0 |
| 1997 | 28 | 0 |
| 1998 | 51 | 0 |
| 1999 | 62 | 0 |
| 2000 | 46 | 0 |
| 2001 | 42 | 3 |
| 2002 | 32 | 32 |
| 2003 | 26 | 23 |
| 2004 | 27 | 35 |
| 2005 | 23 | 24 |
| 2006 | 25 | 30 |
| 2007 | 23 | 17 |
| 2008 | 18 | 20 |
| 2009 | 10 | 21 |
| 2010 | 23 | 17 |
| 2011 | 19 | 14 |
| 2012 | 12 | 15 |
| 2013 | 22 | 36 |
| 2014 | 23 | 19 |
| 2015 | 22 | 30 |
| 2016 | 27 | 30 |
| 2017 | 26 | 21 |
| 2018 | 33 | 21 |
| 2019 | 22 | 38 |
| 2020 | 20 | 36 |
| 2021 | 32 | 19 |
| 2022 | 26 | 31 |
| 2023 | 31 | 29 |
| 2024 | 28 | 29 |
| 2025 | 21 | 17 |
| 2026 | 14 | 14 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Parallel instruction demarcator22 Sep 2026US 12,743,280 B2Onnivation LLC
- Method and apparatus for permuting streamed data elements8 Sep 2026US 12,730,758 B2Texas Instruments Incorporated
- Vector friendly instruction format and execution thereof14 Jul 2026US 12,681,729 B2Intel Corporation
- Predicting a vector length associated with a configuration instruction23 Jun 2026US 12,663,992 B2SiFive, Inc.
- Systems, methods, and apparatuses for tile transpose9 Jun 2026US 12,650,839 B2Intel Corporation
- Encoding and Decoding Variable Length Instructions8 Oct 2026US 2026/0310465 A1Imagination Technologies Limited
- Systems, methods, and apparatuses for tile transpose24 Sep 2026US 2026/0288459 A1Intel Products IP LLC
- Predicting a vector length associated with a configuration instruction17 Sep 2026US 2026/0277606 A1SiFive, Inc.
- Variable-length instruction set mode30 Jul 2026US 2026/0219888 A1Arm Limited
- Methods and apparatus to implement vector processing units16 Jul 2026US 2026/0203252 A1Openchip & Software Technologies S.L.
Most cited
By later US patents
- System and method for controlling a highly parallel multiprocessor using an anarchy based scheduler for parallel execution thread scheduling448US 5,179,702 ASupercomputer Systems Limited Partnership · 1993
- Pipelined data processor capable of decoding and executing plural instructions in parallel341US 4,858,105 AHitachi, Ltd. · 1989
- Method and apparatus for user side scheduling in a multiprocessor operating system program that implements distributive scheduling of processes323US 6,195,676 B1Silicon Graphics, Inc. · 2001
- High performance superscalar microprocessor including a common reorder buffer and common register file for both integer and floating point operations320US 5,651,125 AAdvanced Micro Devices, Inc. · 1997
- Cluster architecture for a highly parallel scalar/vector multiprocessor system255US 5,197,130 ASupercomputer Systems Limited Partnership · 1993