Vector friendly instruction format and execution thereof

A non-transitory machine-readable storage medium storing instructions that if executed cause a machine to perform operations, including to:

• receive occurrences of instructions of a first instruction set that have a first instruction format, wherein the first instruction format has a plurality of fields including a base operation field, a modifier field, an alpha field, and a beta field, wherein the first instruction format supports different versions of base operations and different augmentation operations through placement of different values in the base operation field, the modifier field, the alpha field, and the beta field, and wherein only one of the different values may be placed in each of the base operation field, the modifier field, the alpha field, and the beta field for each of the occurrences of the instructions;
• distinguish the occurrences of the instructions in the first instruction format that specify memory access from those that do not based on the modifier field's content in those different occurrences of the instructions, wherein the beta field is to be interpreted as a broadcast field and a vector length field when the modifier field's content specifies memory access, wherein part of the beta field is to be interpreted as an RL field when the modifier field's content does not specify memory access;
• distinguish, for each of the occurrences of the instructions that specify memory access through the modifier field's content, whether to perform a broadcast operation or not and which one of a plurality of vector lengths to use based on the beta field's content and its interpretation as the broadcast field and the vector length field in that occurrence;
• distinguish, for each of the occurrences of the instructions that do not specify memory access through the modifier field's content, whether to augment with a round type operation or with a vector length type operation based on the RL field's content in that occurrence, wherein a remainder of the beta field is to be interpreted as a round operation field when the RL field's content indicates the round type operation, and wherein the remainder of the beta field is instead to be interpreted as the vector length field when the RL field's content indicates the vector length type operation;
• distinguish, for each of the occurrences of the instructions that do not specify memory access through the modifier field's content and that do specify the round type operation through the RL field's content, which one of a plurality of round operations to apply based on the beta field's content and its interpretation as the round operation field in that occurrence;
• distinguish, for each of the occurrences of the instructions, whether to perform a merging write mask operation or a zeroing write mask operation based on the alpha field's content and its interpretation as a write mask control field in that occurrence;
• and
• convert each of the occurrences of the instructions of the first instruction set to one or more instructions of a second different instruction set.

A non-transitory machine-readable storage medium storing instructions that if executed cause a machine to perform operations, including to:

• receive occurrences of instructions of a first instruction set that have a first instruction format, wherein the first instruction format includes a first plurality of templates that each include a plurality of fields including a base operation field, a data element width (W) field, a vector length field, a write mask control field, and a write mask field, wherein the first instruction format supports through different values in the base operation field specification of different vector operations, wherein each of the different vector operations involves an operation to be performed on each of a plurality of different data element positions of at least one source vector operand to generate at least one destination vector operand, wherein the first instruction format supports through different values in the data element width field specification of different data element widths, wherein the first plurality of templates support through different values in the vector length field specification of different vector lengths, wherein the first instruction format supports through different values in the write mask field specification of different write masks, wherein the first instruction format supports through different values in the write mask control field selection between a merge write mask operation and a zero write mask operation, wherein only one of the different values is to be placed in each of the base operation field, the data element width field, the write mask control field, and the write mask field for each of the occurrences of the instructions in instruction streams, distinguish, for each of the occurrences of the instructions, which one of the different vector operations to perform based on the base operation field's content;
• distinguish, for each of the occurrences of the instructions, which one of the different data element widths to use based on the data element width field's content;
• distinguish, for each of the occurrences of the instructions, which one of the different vector lengths to use based on the vector length field's content;
• distinguish, for each of the occurrences of the instructions which one of the merge write mask operation and the zero write mask operation to perform based on the write mask control field's content;
• distinguish, for each of the occurrences of the instructions, which one of the different write masks to use based on the write mask field's content, wherein the data element width and the vector length for the occurrence distinguishes which data element positions correspond with which bits of the occurrence's write mask, wherein the write mask for the occurrence specifies on a per data element position basis whether results of the occurrence's vector operation are or are not to be reflected in the destination vector operand's corresponding data element positions, wherein those of the destination vector operand's corresponding data element positions that correspond to bits of the occurrence's write mask that have a non-zero value are to reflect the results of the occurrence's vector operation, and wherein those of the destination vector operand's corresponding data element positions that correspond to bits of the occurrence's write mask that have a zero value are to be set to zero when zeroing write mask is selected;
• and
• convert each of the occurrences of the instructions of the first instruction set to one or more instructions of a second different instruction set.