G06F 9/30014
With variable precision
Official title: {with variable precision}
G06F9/30014 (With variable precision) appears on 1,587 US grants and 1,601 published applications in this corpus.
Search patents in G06F- Granted patents
- 1,587
- Published applications
- 1,601
- Assignees
- 300
- Inventors
- 2,104
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1977 | 2 | 0 |
| 1978 | 0 | 0 |
| 1979 | 0 | 0 |
| 1980 | 1 | 0 |
| 1981 | 2 | 0 |
| 1982 | 1 | 0 |
| 1983 | 3 | 0 |
| 1984 | 4 | 0 |
| 1985 | 0 | 0 |
| 1986 | 2 | 0 |
| 1987 | 2 | 0 |
| 1988 | 3 | 0 |
| 1989 | 5 | 0 |
| 1990 | 5 | 0 |
| 1991 | 5 | 0 |
| 1992 | 4 | 0 |
| 1993 | 8 | 0 |
| 1994 | 12 | 0 |
| 1995 | 9 | 0 |
| 1996 | 22 | 0 |
| 1997 | 32 | 0 |
| 1998 | 49 | 0 |
| 1999 | 58 | 0 |
| 2000 | 45 | 0 |
| 2001 | 48 | 8 |
| 2002 | 30 | 33 |
| 2003 | 22 | 28 |
| 2004 | 24 | 62 |
| 2005 | 25 | 37 |
| 2006 | 32 | 40 |
| 2007 | 33 | 37 |
| 2008 | 43 | 70 |
| 2009 | 30 | 50 |
| 2010 | 36 | 23 |
| 2011 | 48 | 30 |
| 2012 | 33 | 37 |
| 2013 | 37 | 53 |
| 2014 | 37 | 41 |
| 2015 | 47 | 37 |
| 2016 | 51 | 46 |
| 2017 | 66 | 72 |
| 2018 | 50 | 81 |
| 2019 | 75 | 114 |
| 2020 | 77 | 117 |
| 2021 | 92 | 96 |
| 2022 | 86 | 98 |
| 2023 | 88 | 74 |
| 2024 | 95 | 89 |
| 2025 | 68 | 88 |
| 2026 | 40 | 140 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Cache structure and utilization6 Oct 2026US 12,754,876 B2Intel Corporation
- Systems and methods for updating memory side caches in a multi-GPU configuration15 Sep 2026US 12,737,317 B2Intel Corporation
- Cache structure and utilization15 Sep 2026US 12,737,318 B2Intel Corporation
- Method and apparatus for permuting streamed data elements8 Sep 2026US 12,730,758 B2Texas Instruments Incorporated
- Multi-tile memory management for detecting cross tile access providing multi-tile inference scaling and providing page migration21 Jul 2026US 12,688,146 B2Intel Corporation
- Inserting null vectors into a stream of vectors8 Oct 2026US 2026/0310466 A1Texas Instruments Incorporated
- Processor27 Aug 2026US 2026/0252311 A1
- Network scheduling method and apparatus20 Aug 2026US 2026/0244444 A1Oriole Networks Ltd.
- Dynamic floating-point processing13 Aug 2026US 2026/0236225 A1Arm Limited
- Converting a stream of data using a lookaside buffer13 Aug 2026US 2026/0236263 A1Texas Instruments Incorporated
Most cited
By later US patents
- Running-min and running-max instructions for processing vectors using a base value from a key element of an input vector426US 8,417,921 B2Apple Inc. · 2013
- Processing vectors using wrapping minima and maxima instructions in the macroscalar architecture418US 8,555,037 B2Apple Inc. · 2013
- High performance superscalar microprocessor including a common reorder buffer and common register file for both integer and floating point operations320US 5,651,125 AAdvanced Micro Devices, Inc. · 1997
- Dual mode SIMD/MIMD processor providing reuse of MIMD instruction memories as data memories when operating in SIMD mode317US 5,239,654 ATexas Instruments Incorporated · 1993
- DRAM with high bandwidth interface that uses packets and arbitration313US 5,778,419 AMicroUnity Systems Engineering, Inc. · 1998