G06F 9/26
Address formation of the next micro-instruction
Official title: Address formation of the next micro-instruction (G06F9/28 takes precedence){; Microprogram storage or retrieval arrangements}
G06F9/26 (Address formation of the next micro-instruction) appears on 609 US grants and 205 published applications in this corpus.
Search patents in G06F- Granted patents
- 609
- Published applications
- 205
- Assignees
- 178
- Inventors
- 924
- Latest grant
- 8 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 24 | 0 |
| 1977 | 19 | 0 |
| 1978 | 16 | 0 |
| 1979 | 17 | 0 |
| 1980 | 9 | 0 |
| 1981 | 12 | 0 |
| 1982 | 17 | 0 |
| 1983 | 25 | 0 |
| 1984 | 24 | 0 |
| 1985 | 23 | 0 |
| 1986 | 20 | 0 |
| 1987 | 16 | 0 |
| 1988 | 15 | 0 |
| 1989 | 25 | 0 |
| 1990 | 13 | 0 |
| 1991 | 12 | 0 |
| 1992 | 14 | 0 |
| 1993 | 12 | 0 |
| 1994 | 12 | 0 |
| 1995 | 14 | 0 |
| 1996 | 17 | 0 |
| 1997 | 11 | 0 |
| 1998 | 18 | 0 |
| 1999 | 14 | 0 |
| 2000 | 9 | 0 |
| 2001 | 6 | 3 |
| 2002 | 5 | 4 |
| 2003 | 6 | 7 |
| 2004 | 6 | 9 |
| 2005 | 12 | 8 |
| 2006 | 4 | 3 |
| 2007 | 6 | 7 |
| 2008 | 4 | 5 |
| 2009 | 4 | 13 |
| 2010 | 7 | 6 |
| 2011 | 9 | 5 |
| 2012 | 3 | 6 |
| 2013 | 3 | 28 |
| 2014 | 17 | 3 |
| 2015 | 26 | 8 |
| 2016 | 8 | 7 |
| 2017 | 6 | 27 |
| 2018 | 9 | 11 |
| 2019 | 9 | 5 |
| 2020 | 11 | 9 |
| 2021 | 10 | 9 |
| 2022 | 9 | 3 |
| 2023 | 10 | 8 |
| 2024 | 3 | 2 |
| 2025 | 5 | 2 |
| 2026 | 3 | 7 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Live firmware update switchover8 Sep 2026US 12,730,629 B2Texas Instruments Incorporated
- Configurable multi-protocol data extraction device30 Jun 2026US 12,669,995 B1Tractian Technologies Inc
- Computing chip and instruction processing method to access source operands in private registers using a relative distance index21 Apr 2026US 12,608,200 B2Huawei Technologies Co., Ltd.
- Control of instruction issue based on issue groups24 Jun 2025US 12,340,216 B1Arm Limited
- Apparatus and methods related to microcode instructions indicating instruction types24 Jun 2025US 12,340,217 B2
- Autopredication of Tail-Nested Region and Loop Many-Trip Count Region11 Jun 2026US 2026/0161393 A1
- Apparatus and Method for Execution and Retirement of Auto-Predicated Program Code Regions11 Jun 2026US 2026/0161394 A1
- Safety supervised general purpose computing devices4 Jun 2026US 2026/0154073 A1Traxen Inc.
- Read only memory (rom) patching21 May 2026US 2026/0140735 A1NXP B. V.
- Data prefetching based on both intra-tile and inter-tile stride information7 May 2026US 2026/0126996 A1Intel Corporation
Most cited
By later US patents
- Real time processor capable of concurrently running multiple independent JAVA machines375US 6,374,286 B1Rockwell Collins, Inc. · 2002
- Hierarchical priority branch handling for parallel execution in a parallel processor218US 4,833,599 AMultiflow Computer, Inc. · 1989
- Floating point microprocessor with directable two level microinstructions198US 4,928,223 AFairchild Semiconductor Corporation · 1990
- System with plurality of processing elememts each generates respective instruction based upon portions of individual word received from a crossbar switch169US 5,055,997 AU. S. Philips Corporation · 1991
- Single chip microprocessor circuits, systems, and methods for self-loading patch micro-operation codes and patch microinstruction codes147US 5,950,012 ATexas Instruments Incorporated · 1999