G06F 7/68
Using pulse rate multipliers or dividers pulse rate multipliers or dividers per
Official title: using pulse rate multipliers or dividers {pulse rate multipliers or dividers per se}(G06F7/70 takes precedence {; frequency division in electronic watches G04G3/02; frequency multiplication or division in oscillators H03B19/00; frequency dividing counters per se H03K23/00 - H03K29/00})
G06F7/68 (Using pulse rate multipliers or dividers pulse rate multipliers or dividers per) appears on 251 US grants and 90 published applications in this corpus.
Search patents in G06F- Granted patents
- 251
- Published applications
- 90
- Assignees
- 172
- Inventors
- 413
- Latest grant
- 2 Jun 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 15 | 0 |
| 1977 | 10 | 0 |
| 1978 | 7 | 0 |
| 1979 | 3 | 0 |
| 1980 | 6 | 0 |
| 1981 | 3 | 0 |
| 1982 | 4 | 0 |
| 1983 | 2 | 0 |
| 1984 | 1 | 0 |
| 1985 | 5 | 0 |
| 1986 | 2 | 0 |
| 1987 | 7 | 0 |
| 1988 | 3 | 0 |
| 1989 | 0 | 0 |
| 1990 | 7 | 0 |
| 1991 | 3 | 0 |
| 1992 | 3 | 0 |
| 1993 | 6 | 0 |
| 1994 | 4 | 0 |
| 1995 | 3 | 0 |
| 1996 | 0 | 0 |
| 1997 | 1 | 0 |
| 1998 | 9 | 0 |
| 1999 | 6 | 0 |
| 2000 | 8 | 0 |
| 2001 | 6 | 3 |
| 2002 | 11 | 9 |
| 2003 | 14 | 10 |
| 2004 | 8 | 5 |
| 2005 | 16 | 11 |
| 2006 | 11 | 6 |
| 2007 | 6 | 7 |
| 2008 | 17 | 8 |
| 2009 | 6 | 8 |
| 2010 | 5 | 2 |
| 2011 | 6 | 4 |
| 2012 | 3 | 2 |
| 2013 | 6 | 2 |
| 2014 | 3 | 1 |
| 2015 | 2 | 0 |
| 2016 | 0 | 1 |
| 2017 | 1 | 3 |
| 2018 | 2 | 2 |
| 2019 | 3 | 0 |
| 2020 | 1 | 0 |
| 2021 | 0 | 1 |
| 2022 | 1 | 4 |
| 2023 | 1 | 0 |
| 2024 | 1 | 1 |
| 2025 | 2 | 0 |
| 2026 | 1 | 0 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Electric vehicle motor rotational speed value generating device2 Jun 2026US 12,647,057 B2Clean Power Plus Co., Ltd.
- Method for pulse-based convolution for near-sensor processing13 May 2025US 12,299,556 B2University of Louisiana at Lafayette
- Methods and devices for digital clock multiplication of a clock to generate a high frequency output18 Mar 2025US 12,255,653 B2Intel Corporation
- Method and system for generating high-order pseudo-random electromagnetic exploration signal14 May 2024US 11,983,511 B2Shandong University
- Apparatus and methods for low power frequency clock generation and distribution24 Jan 2023US 11,561,570 B2Ciena Corporation
- Electric vehicle motor rotational speed value generating device17 Oct 2024US 2024/0348184 A1Clean Power Plus Co., Ltd.
- Methods and devices for digital clock multiplication of a clock to generate a high frequency output29 Dec 2022US 2022/0416770 A1Intel Corporation
- Method and system for generating high-order pseudo-random electromagnetic exploration signal29 Sep 2022US 2022/0308838 A1Shandong University
- Apparatus and methods for low power frequency clock generation and distribution2 Jun 2022US 2022/0171425 A1Ciena Corporation
- Frequency doubler using recirculating delay circuit and method thereof17 Feb 2022US 2022/0052676 A1Realtek Semiconductor Corp.
Most cited
By later US patents
- Precise, low-jitter fractional divider using counter of rotating clock phases85US 5,970,110 ANeoMagic Corp. · 1999
- Apparatus and method for generating a distributed clock signal using gear ratio techniques70US 6,396,887 B1Rambus Inc. · 2002
- Method and apparatus for timing intravenous liquid drip rate65US 4,048,474 A1977
- Programmable secondary clock generator58US 5,256,994 AIntel Corporation · 1993
- Precision frequency and phase synthesis53US 6,329,850 B1Texas Instruments Incorporated · 2001